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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MMPF0200Z датащи(PDF) 53 Page - NXP Semiconductors |
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MMPF0200Z датащи(HTML) 53 Page - NXP Semiconductors |
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53 / 118 page  Analog Integrated Circuit Device Data Freescale Semiconductor 53 PF0200Z Functional Block Requirements and Behaviors Power Generation 6.4.4.5 SW3A/B SW3A/B are 1.25 to 2.5 A rated buck regulators, depending on the configuration. Table 28 describes the available switching modes and Table 29 show the actual configuration options for the SW3xMODE[3:0] bits. SW3A/B can be configured in various phasing schemes, depending on the desired cost/performance trade-offs. The following configurations are available: • A single phase • Independent regulators The desired configuration is programmed in OTP by using the SW3_CONFIG[1:0] bits.Table 57 shows the options for the SW3CFG[1:0] bits. SW3A/B Single Phase In this configuration, SW3ALX and SW3BLX are connected in single phase with a single inductor a shown in Figure 15. This configuration reduces cost and component count. Feedback is taken from the SW3AFB pin and the SW3BFB pin must be left open. Although control is from SW3A, registers of both regulators, SW3A and SW3B, must be identically set. Figure 15. SW3A/B Single Phase Block Diagram Table 57. SW3 Configuration SW3_CONFIG[1:0] Description 00 A/B Single Phase 01 A/B Single Phase 10 Reserved 11 A/B Independent Driver Controller SW3AIN SW3ALX SW3AFB ISENSE COSW3A CINSW3A LSW3A I2C Interface SW3 SW3AMODE SW3AFAULT VIN Driver Controller SW3BIN SW3BLX ISENSE CINSW3B EP SW3BMODE SW3BFAULT VIN EA Z1 Z2 Internal Compensation VREF DAC I2C EA Z1 Z2 Internal Compensation VREF DAC I2C SW3BFB |
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