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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MMPF0200Z датащи(PDF) 19 Page - NXP Semiconductors |
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MMPF0200Z датащи(HTML) 19 Page - NXP Semiconductors |
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19 / 118 page  Analog Integrated Circuit Device Data Freescale Semiconductor 19 PF0200Z Functional Block Requirements and Behaviors Start-up 6 Functional Block Requirements and Behaviors 6.1 Start-up The PF0200Z can be configured to start-up from either the internal OTP configuration, or with a hard-coded configuration built into the device. The internal hard-coded configuration is enabled by connecting the VDDOTP pin to VCOREDIG through a 100 kohm resistor. The OTP configuration is enabled by connecting VDDOTP to GND. For NP devices, selecting the OTP configuration causes the PF0200Z to not start-up. However, the PF0200Z can be controlled through the I2C port for prototyping and programming. Once programmed, the NP device will startup with the customer programmed configuration. 6.1.1 Device Start-up Configuration Table 8 shows the Default Configuration which can be accessed on all devices as described previously. Table 8. Start-up Configuration Registers Default Configuration All Devices Default I2C Address 0x08 VSNVS_VOLT 3.0 V SW1AB_VOLT 1.375 V SW1AB_SEQ 1 SW2_VOLT 3.0 V SW2_SEQ 2 SW3A_VOLT 1.5 V SW3A_SEQ 3 SW3B_VOLT 1.5 V SW3B_SEQ 3 SWBST_VOLT - SWBST_SEQ - VREFDDR_SEQ 3 VGEN1_VOLT - VGEN1_SEQ - VGEN2_VOLT 1.5 V VGEN2_SEQ 2 VGEN3_VOLT - VGEN3_SEQ - VGEN4_VOLT 1.8 V VGEN4_SEQ 3 VGEN5_VOLT 2.5 V VGEN5_SEQ 3 VGEN6_VOLT 2.8 V |
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