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ADSP-SC591 датащи(PDF) 44 Page - Analog Devices

номер детали ADSP-SC591
подробное описание детали  SHARC Dual-Core DSP with Arm Cortex-A5
PDF  143 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADSP-SC591 датащи(HTML) 44 Page - Analog Devices

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Rev. PrD
|
Page 44 of 143
|
May 2021
ADSP-21591/21593/21594/ADSP-SC591/SC592/SC594 Preliminary Technical Data
400-BALL LOW PERIPHERAL COUNT (LPC) BGA SIGNAL DESCRIPTIONS
The processor pin definitions are shown in Table 21 for the 400-
ball LPC BGA package. The columns in this table provide the
following information:
• The signal name column includes the signal name for every
pin and the GPIO multiplexed pin function, where
applicable.
• The description column provides a descriptive name for
each signal.
• The port column shows whether or not a signal is
multiplexed with other signals on a GPIO port pin.
• The pin name column identifies the name of the package
pin (at power on reset) on which the signal is located (if a
single function pin) or is multiplexed (if a GPIO pin).
• The DAI pins and their associated signal routing units
(SRUs) connect inputs and outputs of the DAI peripherals
(SPORT, ASRC, S/PDIF, and PCG). See the Digital Audio
Interface (DAI) chapter of the ADSP-2159x/ADSP-
SC591/592/594 SHARC+ Processor Hardware Reference
for complete information on the use of the DAI and SRUs.
Table 21. ADSP-2159x 400-Ball LPC BGA Signal Descriptions
Signal Name
Description
Port
Pin Name
C1_FLG00
SHARC+ Core 1 FLAGS I/O 0
A
PA_12
C1_FLG01
SHARC+ Core 1 FLAGS I/O 1
A
PA_13
C1_FLG02
SHARC+ Core 1 FLAGS I/O 2
B
PB_03
C1_FLG03
SHARC+ Core 1 FLAGS I/O 3
B
PB_02
CNT0_DG
CNT0 Count Down and Gate
B
PB_05
CNT0_UD
CNT0 Count Up and Direction
B
PB_03
CNT0_ZM
CNT0 Count Zero Marker
B
PB_04
DAI0_PIN01
DAI0 Pin 1
Not Muxed
DAI0_PIN01
DAI0_PIN02
DAI0 Pin 2
Not Muxed
DAI0_PIN02
DAI0_PIN03
DAI0 Pin 3
Not Muxed
DAI0_PIN03
DAI0_PIN04
DAI0 Pin 4
Not Muxed
DAI0_PIN04
DAI0_PIN05
DAI0 Pin 5
Not Muxed
DAI0_PIN05
DAI0_PIN06
DAI0 Pin 6
Not Muxed
DAI0_PIN06
DAI0_PIN07
DAI0 Pin 7
Not Muxed
DAI0_PIN07
DAI0_PIN08
DAI0 Pin 8
Not Muxed
DAI0_PIN08
DAI0_PIN09
DAI0 Pin 9
Not Muxed
DAI0_PIN09
DAI0_PIN10
DAI0 Pin 10
Not Muxed
DAI0_PIN10
DAI0_PIN11
DAI0 Pin 11
Not Muxed
DAI0_PIN11
DAI0_PIN12
DAI0 Pin 12
Not Muxed
DAI0_PIN12
DAI0_PIN19
DAI0 Pin 19
Not Muxed
DAI0_PIN19
DAI0_PIN20
DAI0 Pin 20
Not Muxed
DAI0_PIN20
DAI1_PIN01
DAI1 Pin 1
Not Muxed
DAI1_PIN01
DAI1_PIN02
DAI1 Pin 2
Not Muxed
DAI1_PIN02
DAI1_PIN03
DAI1 Pin 3
Not Muxed
DAI1_PIN03
DAI1_PIN04
DAI1 Pin 4
Not Muxed
DAI1_PIN04
DAI1_PIN05
DAI1 Pin 5
Not Muxed
DAI1_PIN05
DAI1_PIN06
DAI1 Pin 6
Not Muxed
DAI1_PIN06
DAI1_PIN07
DAI1 Pin 7
Not Muxed
DAI1_PIN07
DAI1_PIN08
DAI1 Pin 8
Not Muxed
DAI1_PIN08
DAI1_PIN09
DAI1 Pin 9
Not Muxed
DAI1_PIN09
DAI1_PIN10
DAI1 Pin 10
Not Muxed
DAI1_PIN10
DAI1_PIN11
DAI1 Pin 11
Not Muxed
DAI1_PIN11
DAI1_PIN12
DAI1 Pin 12
Not Muxed
DAI1_PIN12
DAI1_PIN19
DAI1 Pin 19
Not Muxed
DAI1_PIN19
DAI1_PIN20
DAI1 Pin 20
Not Muxed
DAI1_PIN20
DMC0_A00
DMC0 Address 0
Not Muxed
DMC0_A00



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