ADSP-SC591 datasheet(3/143 Pages) AD

3 / 143 page

Rev. PrD

Page 3 of 143

May 2021

ADSP-21591/21593/21594/ADSP-SC591/SC592/SC594

Preliminary Technical Data

REVISION HISTORY

5/2021—Rev. PrC to Rev. PrD

Analog Devices is in the process of updating documentation to

provide terminology and language that is culturally appropriate.

This is a process with a wide scope and will be phased in as

quickly as possible. Thank you for your patience.

Changes to ADSP-SC594 (Full-Featured Model) Processor

Block Diagram ........................................................ 1

Changes to Processor Features .................................... 5

Changes to L1 Requester and Completer Ports ................ 9

Changes to ADSP-2159x/ADSP-SC59x Memory Map ....... 9

Added SHARC Fabric .............................................. 11

Change to footnote in L2 Memory Addressing Map ........ 12

Changes to Cyclic Redundancy Check (CRC) Protected Memo-

ries ...................................................................... 16

Changes to

Asynchronous Sample Rate Converter (ASRC) .............. 17

Added Core Flags I/O Pins ....................................... 21

Changes to Power-Up and Power-Down Sequencing ...... 23

Changes to Development Tools ................................. 24

Changes to ADSP-2159x/ADSP-SC59x Detailed Signal Descrip-

tions .................................................................... 26

Changes to

ADSP-SC59x 400-Ball HPC BGA Signal Descriptions ..... 30

Changes to ADSP-SC59x Signal Multiplexing for Port C .. 40

Changes to

ADSP-2159x 400-Ball LPC BGA Signal Descriptions ...... 44

Changes to ADSP-2159x Signal Multiplexing for Port C .. 51

Changes to ADSP-2159x/ADSP-SC59x Designer Quick Refer-

ence .................................................................... 52

Added Preliminary Specifications ............................... 68

Added Planned Automotive Production Products ......... 142

Added Planned Production Products ......................... 142

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