CDCE706 datasheet(6/32 Pages) TI

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DEVICE CHARACTERISTICS

CDCE706

SCAS815A – OCTOBER 2005 – REVISED OCTOBER 2005

TIMING REQUIREMENTS (continued)

over recommended ranges of supply voltage, load, and operating-free air temperature

MIN

NOM

MAX

UNIT

tBUS

Bus free time

4.7

µs

tPOR

Time in which the device must be operational after power-on reset

500

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

OVERALL PARAMETER

ICC

Supply current

All PLLs on, all outputs on,

115

fout = 80 MHz, fCLK_IN = 27 MHz,

fvco = 160 MHz

ICCPD

Power down current. Every circuit powered

fIN = 0 MHz, VCC = 3.6 V

300

µA

down except SMBus

VPUC

Supply voltage Vcc threshold for power up

2.3

control circuit

Normal speed-mode(2)

167

VCO frequency of internal PLL (any of three

fVCO

MHz

PLLs)

High-speed mode(2)

150

300

VCC = 2.5 V

250

fOUT

LVCMOS output frequency range

MHz

VCC = 3.3 V

300

LVCMOS PARAMETER

VIK

LVCMOS input voltage

VCC = 3 V; II = –18 mA

–1.2

LVCMOS input current

VI = 0 V or VCC, VCC = 3.6 V

TBD

µA

IIH

LVCMOS input current For S1/S0

VI = VCC, VCC = 3.6 V

TBD

µA

IIL

LVCMOS input current For S1/S0

VI = 0 V, VCC = 3.6 V

TBD

µA

Input capacitance at CLK_IN0 and CLK_IN1

VI = 0 V or VCC

(1)

All typical values are at respective nominal VCC.

(2)

Normal-speed mode or high-speed mode must be selected by the VCO frequency selection bit in Byte 6, Bit [7:5]. The min fvco can be

lower but impacts jitter-performance.

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