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L99LD02 датащи(PDF) 35 Page - STMicroelectronics

номер детали L99LD02
подробное описание детали  Automotive dual-phase boost DC/DC controller
PDF  66 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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L99LD02 датащи(HTML) 35 Page - STMicroelectronics

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L99LD02
Serial peripheral interface (ST SPI standard)
64
5.3.2
Device application registers
The Device Application Registers are all registers accessible using OpCode ‘00’, ‘01’ and
‘10’.
An access to an unused address will not lead to any error. Any data read from an unused
address is not defined.
5.4
Protocol failure detection
To realize a protocol which fulfills certain failsafe requirements, a basic set of failure
detection mechanisms is implemented.
5.4.1
Clock monitor
During communication (CSN low to high phase) a clock monitor counts the valid SCK clock
edges. If the SCK edges do not correlate with the SPI Data Length, an SPIE is reported with
the next command and the current communication is rejected.
By accessing the Device Information Registers (OpCode = ‘11’), the Clock Monitor is set to
a minimum of 16 SCK edges plus a multiple of 8 (e.g. 16, 24, 32).
Providing no SCK edge during a CSN low to high phase is not recognized as an SPIE.
5.4.2
SCK polarity (CPOL) check
To detect wrong polarity access on SCK, the internal clock monitor is used. Providing first a
negative edge on SCK during communication (CSN low to high phase) or a positive edge at
last will lead to an SPI Error being reported in the next communication and the current data
is rejected.
5.4.3
SCK phase (CPHA) check
To verify that the SCK phase of the SPI master is set correctly a special Device Information
Register is implemented. By reading this register the data must be 55H. In case AAH is
read, the CPHA setting of the SPI master is wrong and a proper communication cannot be
guaranteed.
5.4.4
CSN timeout
By pulling CSN low, the SDO is set active and leaves the tri-state condition. To ensure
communication between other SPI devices within the same bus even in case of CSN stuck
at low, a CSN timeout is implemented. By pulling CSN low, an internal timer is started. After
the timer end is reached, the current communication is rejected and the SDO is set to tri-
state condition. This error is not reported in any specific status register.
5.4.5
Data stuck
SDI stuck at GND
As a command with all data bits set to ‘0’ and OpCode ‘00’ on address b’000000 cannot
be distinguished from an SDI stuck-at-GND error, this command is not allowed. In case



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