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L99LD02 датащи(PDF) 45 Page - STMicroelectronics |
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L99LD02 датащи(HTML) 45 Page - STMicroelectronics |
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45 / 66 page ![]() DS12448 Rev 3 45/66 L99LD02 Serial peripheral interface (ST SPI standard) 64 16÷15 00 WD_STATUS Watchdog status bit WD timer status: 00 --> [0…25%] 01 --> [25% … 50%] 10 --> [50% … 75%] 11 --> [75% … 100%] R 14 0 WD_FAIL Watchdog failure bit: [0]: Watchdog OK; [1]: Watchdog failure in Active Mode When this bit is set, device goes to Limp Home R/C 13 0 VS_UV_FAIL VS undervoltage bit [0]: VS > VS,UV + VS,UV _HYS OR BST_OUT_SUPPLY = 1 [1]: VS ≤ VS,UV AND BST_OUT_SUPPLY = 0 R 12 Unused 11 0 BST_OUT_SUPPLY The supply voltage of 10V regulator has changed from VS to BST_OUT [0]: VS > VS,LV+ VS,LV _HYS (VS,LV=0) OR BST_OUT<15V [1]: VS ≤ VS,LV (VS,LV=1) AND BST_OUT ≥ 15V R 10÷9 00 Unused 8 0 N_PWR_GOOD This bit reflects the status of signal boost power good (negative) [0]: Output Boost voltage higher than or equal to 92.5% of its target value [1]: Output Boost voltage lower than 92.5% of its target value N_PWR_GOOD is not set when BST_DIS = 1 R 70 BST_OVP Boost Over Voltage Protection. This bit is set when VFB > VFB_OV_ON for more than tBST_OVP, while is reset when VFB < VFB_OV_OFF for more than tBST_OVP_RST IF BST_DIS = 1 then BST_OVP is not set. IF BST_OUT_FAIL = 1 then BST_OVP is not set. R Table 26. SR#1: Status Register 1 (continued) Bit Defaul t Name Description Acces s |
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