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XIO2001IPNP датащи(PDF) 72 Page - Texas Instruments |
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XIO2001IPNP датащи(HTML) 72 Page - Texas Instruments |
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72 / 144 page ![]() 72 XIO2001 SCPS212I – MAY 2009 – REVISED JANUARY 2016 www.ti.com Product Folder Links: XIO2001 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Table 42. Serial-Bus Control and Status Register Description (continued) BIT FIELD NAME ACCESS DESCRIPTION 2(1) SBTEST RW Serial-bus test. This bit is used for internal test purposes. This bit controls the clock source for the serial interface clock. 0 = Serial-bus clock at normal operating frequency ~ 60 kHz (default) 1 = Serial-bus clock frequency increased for test purposes ~ 4 MHz 1(1) SB_ERR RCU Serial-bus error. This bit is set when an error occurs during a software-initiated serial-bus cycle. 0 = No error 1 = Serial-bus error 0(1) ROM_ERR RCU Serial EEPROM load error. This bit is set when an error occurs while downloading registers from serial EEPROM. 0 = No error 1 = EEPROM load error 8.4.60 GPIO Control Register This register controls the direction of the five GPIO terminals. This register has no effect on the behavior of GPIO terminals that are enabled to perform secondary functions. The secondary functions share GPIO0 (CLKRUN), GPIO1 (PWR_OVRD), GPIO3 (SDA), and GPIO4 (SCL). See Table 43 for a complete description of the register contents. PCI register offset: B4h Register type: Read-only, Read/Write Default value: 0000h BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (1) These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset. Table 43. GPIO Control Register Description BIT FIELD NAME ACCESS DESCRIPTION 15:5 RSVD R Reserved. Return 000h when read. 4(1) GPIO4_DIR RW GPIO 4 data direction. This bit selects whether GPIO4 is in input or output mode. 0 = Input (default) 1 = Output 3(1) GPIO3_DIR RW GPIO 3 data direction. This bit selects whether GPIO3 is in input or output mode. 0 = Input (default) 1 = Output 2(1) GPIO2_DIR RW GPIO 2 data direction. This bit selects whether GPIO2 is in input or output mode. 0 = Input (default) 1 = Output (1) GPIO1_DIR RW GPIO 1 data direction. This bit selects whether GPIO1 is in input or output mode. 0 = Input (default) 1 = Output 0(1) GPIO0_DIR RW GPIO 0 data direction. This bit selects whether GPIO0 is in input or output mode. 0 = Input (default) 1 = Output |
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