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ADP5600ACPZ-R7 датащи(PDF) 18 Page - Analog Devices

номер детали ADP5600ACPZ-R7
подробное описание детали  Interleaved Inverting Charge Pump with Negative LDO Regulator
PDF  25 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADP5600ACPZ-R7 датащи(HTML) 18 Page - Analog Devices

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ADP5600
Data Sheet
Rev. 0 | Page 18 of 25
CURRENT-LIMIT AND OUTPUT SHORT-CIRCUIT
PROTECTION (SCP)
The ADP5600 includes a current-limit protection circuitry to
limit the input and output current. The current-limit circuitry
clamps the current flow to 200 mA on both the charging phase
and output phase. Because C1 and C2 are out of phase, there is a
continuous 200 mA flowing at VIN and CPOUT, as shown in
Figure 50 and Figure 51.
Figure 50. Current Limit, C1 Charging Phase and C2 Output Phase
Figure 51. Current Limit, C2 Charging Phase and C1 Output Phase
Figure 52 shows the response of ADP5600 when a hard short
from CPOUT to ground occurs.
Figure 52. CPOUT Entry to Short Circuit
If the hard short occurs from LDO_OUT to GND, the
ADP5600 LDO current limit is hit first, so that only −160 mA is
conducted into the short.
Figure 53. LDO_OUT Entry to Short Circuit
POWER GOOD
Power good (PGOOD) is an active high, open-drain output and
requires a resistor to pull it up to a voltage. When PGOOD is
high, it indicates that the voltage on the FB pin, and therefore
the LDO output voltage, is near the desired value. A low on the
PGOOD pin indicates that the voltage on the FB pin is not
within the desired value. There is an eight-switching cycle
waiting period after FB goes below PGTH and PGOOD asserts
low. If VFB goes above PGTH within the eight switching cycles,
the event is ignored by the PGOOD circuitry.
UNDERVOLTAGE LOCKOUT (UVLO)
Undervoltage lockout circuitry is integrated in the ADP5600 to
prevent the occurrence of power-on glitches. If the VIN voltage
drops below UVLOFALLING, then the ADP5600 partially shuts
down with the oscillator, charge pump, and LDO regulator
turned off. When the VIN voltage rises again above UVLORISING,
the soft start period is initiated and the ADP5600 is fully
enabled.
Figure 54. UVLO Threshold
+
CCPOUT
+
CC2
CPOUT
VIN
–INMOSLIMIT
+
CIN
+
CC1
IPMOSLIMIT
+
CCPOUT
+
CPOUT
VIN
+
CIN
+
CC2
CC1
–INMOSLIMIT
IPMOSLIMIT
CH1 200mA BW CH2 5.00V BW
CH3 1.00V BW CH4 10.0V BW
M100µs
A CH2
–3.40V
1
2
3
4
T
191µs
0
PGOOD
C1+
VLDO_OUT
VCPOUT
IIN
T
CH1 100mA BW CH2 5.00V BW
CH3 1.00V BW CH4 10.0V BW
M400µs
A CH3
–480V
1
2
3
4
T
78.8µs
0
PGOOD
C1+
VLDO_OUT
VCPOUT
IIN
T
0.1
–0.6
–0.5
–0.2
–0.4
0
–0.3
–0.1
INPUT VOLTAGE (V)
UVLO_RISING
UVLO_FALLING



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