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MSC8101 датащи(PDF) 16 Page - Freescale Semiconductor, Inc

номер детали MSC8101
подробное описание детали  Silicon Errata for the MSC8101 Processor, Mask 0K40A
PDF  28 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5
16
Freescale Semiconductor
CPM40
Corruption in AAL0 IDLE Cell
Date Added: 5/30/2000
There is a rare case when transmitting an ATM idle cell that the idle cell may be
corrupted. This can occur in certain internal sequences of events that cannot be controlled
or detected by the user.
Place the Idle Base template at address 64 byte align minus 4. For example use
Idle_BASE = 0x2cfc not 0x2d00.
4648b
Rev A
0K40A
CPM41
Limitation in ATM Controller
Date Added: 5/30/2000
There are some limitations in the ATM controller. The first limitation is that only the
first 8 PM tables can be used instead of 64. When using these 8 tables, the user must clear
the 5 most significant bits of TBD_BASE (in case of Tx PM) or RBD_BASE (in case of
Rx PM). The second limitation is that only the first 2048 ATM channel numbers can be
used.
There is a microcode patch that can fix the PM limitation. The ATM channel number
limitation has no workaround.
4744
Rev A
0K40A
CPM42
Data Corruption in MCC
Date Added: 5/30/2000
Description: Data corruption may occur in the receive buffers of MCC channels when more then
one TDM slot uses 7 bits of contiguous data.
Workaround: It is possible to avoid this problem by splitting the 7 bits slots between two SI ram
entries such that one entry will represent 4 bits of the slot and the other SI entry will represent 3
bits of the slot. The errata occurs only when all the 7 bits are represented by one entry in the SI
ram.
System Number: 4743
Fix Plan: Rev A
0K40A
CPM43
TxCLAV Ignored By UTOPIA in Single PHY Mode
Date Added: 5/30/2000
Description: When the FCC transmitter is configured to work in UTOPIA single PHY master
mode, it ignores negation of the TxCLAV signal. Therefore, the UTOPIA slave cannot control the
flow of cells by negating TxCLAV. Note that this bug affects Rev A.1 chips only.
Workaround: Configure the FCC to work in multi-master mode but limit the number of PHYs
to 1 by programming: FPSMR[LAST PHY] = 5’b0
System Number: 4882
Fix Plan: Rev A
0K40A
Table 2. Silicon Errata (Continued)
Errata
Number
Errata Description
Applies
to Mask



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