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MSC8101 датащи(PDF) 22 Page - Freescale Semiconductor, Inc |
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MSC8101 датащи(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 28 page ![]() Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5 22 Freescale Semiconductor CPM96 ATM Performance Monitoring with AAL1 CES Date Added: 2/25/2003 Description: ATM Performance Monitoring with AAL1 CES Data in DPRAM is corrupted when performance monitoring is enabled in the receiver. Workaround: Implement one of the following: 1. Disable Receive Performance Monitoring RCT[PMT]=0. 2. Use microcode patch available from Freescale. Fix Plan: TBD 0K40A CPM98 I 2C Erratic Behavior Can Occur if Extra Clock Pulse is Detected on SCL Date Added: 8/25/2003 Description: The I2C controller has an internal counter that counts the number of bits sent. This counter is reset when the I2C controller detects a START condition. When an extra SCL clock pulse is inserted between transactions (before START and after STOP conditions), the internal counter may not get reset correctly. This could generate partial frames (less than 8 bits) in the next transaction. Workaround: Do not generate extra SCL pulses on the I2C bus. In a noisy environment, the dig- ital filter I2MOD[FLT] and additional filtering capacitors should be used on SCL to eliminate clock spikes that may be misinterpreted as clock pulses. System Number: MSIls09133 Fix Plan: 0K40A CPM99 CPM 99: ABR TCTE[ER-TA] Corruption Date Added: 8/25/2003 Description: When the AAL5 ABR ROM microcode is in use, the TCTE[ER-TA] field can be overwritten with an erroneous value. This, in turn, causes the TCTE[ER-BRM] to be updated with this value. Because TCTE[ER-BRM] holds the maximum explicit rate value allowed for B-RM cells, an erroneous value in this field could have a detrimental effect on the network performance. Workaround: Use the microcode patch available from Freescale 0K40A CPM100 CPM 100: ABR TCTE Address Miscalculation Date Added: 8/25/2003 Description: When using the AAL5 ABR ROM microcode with external ATM channels it is pos- sible for the EXT_TCTE_BASE word value (written by the user to DPRAM) to be misread. In this case calculations performed by the microcode to access the users programmed external TCTE will be incorrect with a high chance of the access resulting in a CPM crash. Workaround: Use the microcode patch available from Freescale. System Number: MSIls09131 Fix Plan: 0K40A Table 2. Silicon Errata (Continued) Errata Number Errata Description Applies to Mask |
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