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M58LT128GS датащи(PDF) 80 Page - STMicroelectronics

номер детали M58LT128GS
подробное описание детали  128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories
PDF  98 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M58LT128GS датащи(HTML) 80 Page - STMicroelectronics

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13 Part Numbering
M58LT128GST, M58LT128GSB
80/98
1.
The variable P is a pointer which is defined at CFI offset 015h.
2.
Bank Regions. There are two Bank Regions, see Table 30 to Table 35.
(P+32)h = 13Ch
06h
Bank Region 1 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized
erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
(P+33)h = 13Dh
00h
(P+34)h = 13Eh
00h
(P+35)h = 13Fh
02h
(P+36)h = 140h
64h
Bank Region 1 (Erase Block Type 2)
Minimum block erase cycles × 1000
(P+37)h = 141h
00h
(P+38)h = 142h
02h
Bank Regions 1 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+39)h = 143h
03h
Bank Region 1 (Erase Block Type 2): Page mode and
Synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Flash memory (top)
Flash memory
(bottom)
Description
Offset
Data
Offset
Data



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