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LTC4244IGN датащи(PDF) 8 Page - Linear Technology |
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LTC4244IGN датащи(HTML) 8 Page - Linear Technology |
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8 / 28 page ![]() 8 LTC4244/LTC4244-1 42441f RESETOUT (Pin 10): Open-Drain Digital Output. Connect the CPCI_LOCAL_RST# signal to the RESETOUT pin. RESETOUT is the logical combination of the RESETIN and PWRGD. DRIVE (Pin 11): Precharge Base Drive Output. Provides base drive for an external NPN emitter-follower that in turn biases the PRECHARGE node. PRECHARGE (Pin 12): Precharge Monitor Input. An inter- nal error amplifier servos the DRIVE pin voltage to keep the PRECHARGE node at 1V. See Applications Information for generating voltages other than 1V. If not used, tie the PRECHARGE pin to ground. 5VIN (Pin 13): 5V Supply Sense Input. An undervoltage lockout circuit prevents the switches from turning on when the voltage at the 5VIN pin is less than 4.25V. 5VSENSE (Pin 14): 5V Current Limit Sense. With a sense resistor placed in the supply path between 5VIN and 5VSENSE, the GATE pin voltage will be adjusted to maintain a constant 51mV across the sense resistor and a constant current through the switch while the TIMER pin is low. A foldback feature makes the current limit decrease as the voltage at the 5VOUT pin approaches GND. When the TIMER pin is high, the circuit breaker function is enabled. If the voltage across the sense resistor exceeds 52mV, the circuit breaker is tripped after a 25 µs time delay. In the event of a short-circuit or large overcurrent transient condition, the GATE pin voltage will be adjusted to main- tain a constant 150mV across the sense resistor and a constant current through the switch. GATE (Pin 15): High Side Gate Drive for the External 3.3V and 5V N-Channel Pass Transistors. An external series RC network is required for current limit loop compensation and setting the minimum ramp-up time. During power-up, the slope of the voltage rise at the GATE is set by the 67 µA current source connected through a Schottky diode to 12VIN and the external capacitor connected to GND (C1 in Figure 1) or by the 3.3V or 5V current limit and the bulk capacitance in the 3.3VOUT or 5VOUT supply lines. During power down, the slew rate of the GATE voltage is set by the 60 µA current source connected to GND and the external GATE capacitor (C1 in Figure 1). The voltage at the GATE pin will be modulated to maintain a constant current when either the 5V or 3.3V supplies go into current limit. In the event of an overcurrent fault, the GATE pin is immediately pulled to GND. 3.3VSENSE (Pin 16): 3.3V Current Limit Sense. With a sense resistor placed in the supply path between 3.3VIN and 3.3VSENSE, the GATE pin voltage will be adjusted to maintain a constant 51mV across the sense resistor and a constant current through the switch while the TIMER pin is low. A foldback feature makes the current limit decrease as the voltage at the 3.3VOUT pin approaches GND. When the TIMER pin is high, the circuit breaker function is enabled. If the voltage across the sense resistor exceeds 52mV, the circuit breaker is tripped after a 25 µstimedelay. In the event of a short-circuit or large overcurrent transient condition, the GATE pin voltage will be adjusted to main- tain a constant 150mV across the sense resistor and a constant current through the switch. If no 3.3V input supply is available, short the 3.3VSENSE pin to the 5VIN pin. PI FU CTIO S |
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