DP83821 datasheet(66/86 Pages) NSC

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4.0 Register Set (Continued)

4.2.28 Transmit Descriptor Pointer 1 Register

This register points to the Transmit Descriptor for Priority Queue 1.

4.2.29 Transmit Descriptor Pointer 2 Register

This register points to the Transmit Descriptor for Priority Queue 2.

4.2.30 Transmit Descriptor Pointer 3 Register

This register points to the Transmit Descriptor for Priority Queue 3.

Tag: TXDP1

Size: 32 bits

Hard Reset: 00000000h

Offset: 00A0h

Access: Read Write

Soft Reset: 00000000h

bit

tag

description

usage

31-3

TXDP1

Transmit

Descriptor Pointer

The current value of the transmit descriptor pointer for Priority Queue 1. When initializing

the queue for a new transmission, software must set TXDP to the address of a completed

transmit descriptor. While the transmit state machine is active, TXDP will follow the state

machine as it advances through a linked list of active descriptors. If the link field of the

current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,

but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR

descriptor to check for new descriptors that may have been appended to the end of the

list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory

(A2-A0 must be 0).

2-0

unused

Tag: TXDP2

Size: 32 bits

Hard Reset: 00000000h

Offset: 00A4h

Access: Read Write

Soft Reset: 00000000h

bit

tag

description

usage

31-3

TXDP2

Transmit

Descriptor Pointer

The current value of the transmit descriptor pointer for Priority Queue 2. When initializing

the queue for a new transmission, software must set TXDP to the address of a completed

transmit descriptor. While the transmit state machine is active, TXDP will follow the state

machine as it advances through a linked list of active descriptors. If the link field of the

current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,

but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR

descriptor to check for new descriptors that may have been appended to the end of the

list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory

(A2-A0 must be 0).

2-0

unused

Tag: TXDP3

Size: 32 bits

Hard Reset: 00000000h

Offset: 00A8h

Access: Read Write

Soft Reset: 00000000h

bit

tag

description

usage

31-3

TXDP3

Transmit

Descriptor Pointer

The current value of the transmit descriptor pointer for Priority Queue 3. When initializing

the queue for a new transmission, software must set TXDP to the address of a completed

transmit descriptor. While the transmit state machine is active, TXDP will follow the state

machine as it advances through a linked list of active descriptors. If the link field of the

current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,

but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR

descriptor to check for new descriptors that may have been appended to the end of the

list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory

(A2-A0 must be 0).

2-0

unused

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