DP83821 datasheet(51/86 Pages) NSC

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4.0 Register Set (Continued)

4.2.13 General Purpose I/O Control Register

This register allows configuration of the General Purpose I/O pins. Note that these pins are especially useful when

interfacing to a Ten-Bit Interface Phy Device.

15-8

FLTH

Tx Fill Threshold

Specifies the fill threshold in units of 32 bytes. When the number of

available bytes in the transmit FIFO reaches this level, the transmit bus

master state machine will be allowed to request the PCI bus for transmit

packet fragment reads. A value of 0 in this field will produce unexpected

results and must not be used.

7-0

DRTH

Tx Drain Threshold

Specifies the drain threshold in units of 32 bytes. When the number of

bytes in the FIFO reaches this level (or the FIFO contains at least one

complete packet) the MAC transmit state machine will begin the

transmission of a packet. NOTE: In order to prevent a deadlock condition

from occurring, the transmit drain threshold should never be set higher than

the (txFIFOsize - TXCFG:FLTH). A value of 0 in this field will prevent

draining of the packet until the complete packet has been loaded into the

FIFO.

Tag: GPIOR

Size: 32 bits

Hard Reset: 00000000h

Offset: 002Ch

Access: Read Write

Soft Reset: 00000000h

bit

tag

description

usage

31-15

unused

GP5_IN

General Purpose Pin 5 Input

Value

Input value from the GP5 pin. When GP5_OE is a 1, this should reflect the

value of GP5_OUT. RO

GP4_IN

General Purpose Pin 4 Input

Value

Input value from the GP4 pin. When GP4_OE is a 1, this should reflect the

value of GP4_OUT. RO

GP3_IN

General Purpose Pin 3 Input

Value

Input value from the GP3 pin. When GP3_OE is a 1, this should reflect the

value of GP3_OUT. RO

GP2_IN

General Purpose Pin 2 Input

Value

Input value from the GP2 pin. When GP2_OE is a 1, this should reflect the

value of GP2_OUT. RO

GP1_IN

General Purpose Pin 1 Input

Value

Input value from the GP1 pin. When GP1_OE is a 1, this should reflect the

value of GP1_OUT. RO

GP5_OE

General Purpose Pin 5 Output

Enable

Enables the GP5 pin for use as an output. This bit is loaded from EEPROM

at power-up. R/W

GP4_OE

General Purpose Pin 4 Output

Enable

Enables the GP4 pin for use as an output. This bit is loaded from EEPROM

at power-up. R/W

GP3_OE

General Purpose Pin 3 Output

Enable

Enables the GP3 pin for use as an output. This bit is loaded from EEPROM

at power-up. R/W

GP2_OE

General Purpose Pin 2 Output

Enable

Enables the GP2 pin for use as an output. This bit is loaded from EEPROM

at power-up. R/W

GP1_OE

General Purpose Pin 1 Output

Enable

Enables the GP1 pin for use as an output. This bit is loaded from EEPROM

at power-up. R/W

GP5_OUT

General Purpose Pin 5 Output

Value

Controls the output value on the GP5_DUP pin if the GP5_OE bit is set.

This bit is loaded from EEPROM at power-up. R/W

GP4_OUT

General Purpose Pin 4 Output

Value

Controls the output value on the GP4 pin if the GP4_OE bit is set. This bit is

loaded from EEPROM at power-up.

GP3_OUT

General Purpose Pin 3 Output

Value

Controls the output value on the GP3 pin if the GP3_OE bit is set. This bit is

loaded from EEPROM at power-up. R/W

GP2_OUT

General Purpose Pin 2 Output

Value

Controls the output value on the GP2 pin if the GP2_OE bit is set. This bit is

loaded from EEPROM at power-up.

GP1_OUT

General Purpose Pin 1

Controls the output value on the GP1 pin if the GP1_OE bit is set. This bit is

loaded from EEPROM at power-up. R/W

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