DSM2180F3 datasheet(31/63 Pages) STMICROELECTRONICS

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DSM2180F3

The OMC Mask Register. There is one Mask

Macrocells (OMC). The Mask Registers can be

used to block the loading of data to individual Out-

put Macrocells (OMC). The default value for the

Mask Registers is 00h, which allows loading of the

Output Macrocells (OMC). When a given bit in a

Mask Register is set to a 1, the DSP is blocked

from writing to the associated Output Macrocells

(OMC). For example, suppose McellAB0-3 are be-

ing used for a state machine. You would not want

a DSP write to McellAB to overwrite the state ma-

chine registers. Therefore, you would want to load

the Mask Register for McellAB (Mask Macrocell

AB) with the value 0Fh.

The Output Enable of the OMC. The

Output

Macrocells (OMC) block can be connected to an I/

O port pin as a PLD output. The output enable of

each port pin driver is controlled by a single prod-

uct term from the AND Array, ORed with the Direc-

tion Register output. The pin is enabled upon

Power-up if no output enable equation is defined

and if the pin is declared as a PLD output in PSD-

soft Express.

If the Output Macrocell (OMC) output is specified

as an internal node and not as a port pin output in

the PSDsoft Express, then the port pin can be

used for other I/O functions. The internal node

feedback can be routed as an input to the AND Ar-

ray.

Figure 18. Input Macrocell

Input Macrocells (IMC). The CPLD has 16 Input

Macrocells (IMC), one for each pin on Ports B and

C. The architecture of the IMCs is shown in Figure

18. The IMCs are individually configurable, and

can be used as a latch, a register, or to pass in-

coming Port signals prior to driving them onto the

PLD input bus. This is useful for sampling and de-

bouncing inputs to the AND array (keypad inputs,

etc.). Additionally, the outputs of the IMCs can be

read by the DSP asynchronously at any time

through the internal data bus using the csiop reg-

ister block (see Table 4).

The enable for the latch and clock for the register

are driven by a product term from the CPLD. Each

product term output is used to latch or clock four

IMCs. Port inputs 3-0 can be controlled by one

product term and 7-4 by another.

Configurations for the IMCs are specified by equa-

tions specified in PSDsoft Express. See Applica-

tion note

AN1171.

OUTPUT

Macrocells BC

AND

Macrocells AB

Feedback

Port

Driver

I/O Pin

INTERNAL DATA BUS

D [ 7: 0]

DIRECTION

MUX

LATCH

Input Macrocell

ENABLE (.OE)

D FF

INPUT MACROCELL _ RD

AI04904B

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