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CF52012 датащи(PDF) 36 Page - Intel Corporation |
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CF52012 датащи(HTML) 36 Page - Intel Corporation |
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36 / 48 page ![]() The device initiates a self-timed write cycle immediately after the nCS signal is driven high. For details about the self-timed write cycle time, refer to tWB in the related information below. You must account for this amount of delay before another page of memory is written. Alternatively, you can check the write in progress bit in the status register by executing the read status operation while the self-timed write cycle is in progress. The write in progress bit is set to 1 during the self-timed write cycle and 0 when it is complete. Note: You must erase all the memory bytes of EPCQ devices before you implement the write bytes operation. You can erase all the memory bytes by executing the erase sector operation in a sector or the erase bulk operation throughout the entire memory 1.7.10. Extended Dual Input Fast Write Bytes Operation (D2h) This operation is similar to the write bytes operation except that the data and addresses are shifted in on the DATA0 and DATA1 pins. Figure 16. Extended Dual Input Fast Write Bytes Timing Diagram To access the entire EPCQ256 or EPCQ512/A memory, use 4-byte addressing mode. In the 4-byte addressing mode, the address width is 32-bit address. 2 1 3 9 10 11 12 13 14 0 14 12 10 8 DCLK DATA0 nCS DATA1 Operation Code (D2h) DCLK DATA0 nCS DATA1 33 21 22 23 24 25 26 27 28 29 30 31 32 1 7 5 1 3 7 5 1 0 4 0 2 15 16 17 18 19 20 23 21 19 17 15 13 11 9 7 1 22 20 18 16 6 0 24-bitAddress 34 MSB 35 0 7 1 MSB MSB MSB Data In 4 Data In 1 Data In 3 Data In 2 6 4 0 2 1 MSB Data In 256 18 19 20 2 4 5 3 4 5 6 7 8 5 3 7 5 3 3 6 4 2 6 4 2 6 4 2 0 6 7 5 3 1.7.11. Extended Quad Input Fast Write Bytes Operation (12h or 38h) This operation is similar to the extended dual input fast write bytes operation except that the data and addresses are shifted in on the DATA0, DATA1, DATA2, and DATA3 pins. 1. Quad-Serial Configuration (EPCQ) Devices Datasheet CF52012 | 2018.06.01 Quad-Serial Configuration (EPCQ) Devices Datasheet 36 |
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