EM78P568

8-bit OTP Micro-controller

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* This specification are subject to be changed without notice.

11

01/31/2004

V4.7

Please refer to VII.1 Operational registers for detail R PAGE register configuration.

R4 (RAM selection for common registers R20 ~ R3F))

(RAM selection register)

7

6

5

4

3

2

1

0

RB1

RB0

RSR5

RSR4

RSR3

RSR2

RSR1

RSR0

R/W-0

R/W-0

R/W

R/W

R/W

R/W

R/W

R/W

Bit 0 ~ Bit 5 (RSR0 ~ RSR5) : Indirect addressing for common registers R20 ~ R3F

RSR bits are used to select up to 32 registers (R20 to R3F) in the indirect addressing mode.

Bit 6 ~ Bit 7 (RB0 ~ RB1) : Bank selection bits for common registers R20 ~ R3F

These selection bits are used to determine which bank is activated among the 4 banks for 32 register (R20 to

R3F)..

Please refer to VII.1 Operational Registers for details.

R5 (PORT5 I/O data, Program page selection, LCD address)

PAGE0 (PORT5 I/O data register, Program page register)

7

6

5

4

3

2

1

0

P57

P56

P55

-

PS3

PS2

PS1

PS0

R/W

R/W

R/W

R/W-0

R/W-0

R/W-0

R/W-0

Bit 0 ~ Bit 3 (PS0 ~ PS3) : Program page selection bits

PS3

PS2

PS1

PS0

Program memory page (Address)

0

0

0

0

Page 0

0

0

0

1

Page 1

0

0

1

0

Page 2

0

0

1

1

Page 3

:

:

:

:

:

:

:

:

:

:

1

1

1

0

Page 14

1

1

1

1

Page 15

User can use PAGE instruction to change page to maintain program page by user. Otherwise, user can use

far jump (FJMP) or far call (FCALL) instructions to program user's code. And the program page is

maintained by EMC's complier. It will change user's program by inserting instructions within program.

Bit 4 : (undefined) not allowed to use

Bit 5 ~ Bit 7 (P55 ~ P57) : 8-bit PORT5(5~7) I/O data register

User can use IOC register to define input or output each bit.

PAGE1 (LCD address)

7

6

5

4

3

2

1

0

-

-

-

-

LCDA3

LCDA2

LCDA1

LCDA0

R/W-0

R/W-0

R/W-0

R/W-0

Bit 0 ~ Bit 3 (LCDA0 ~ LCDA3) : LCD address for LCD RAM read or write

The address of the LCD RAM correspond to the COMMON and SEGMENT signals as the table.

COM3 ~ COM0

LCD address

(LCDA3 ~ LCDA0)

SEG1, SEG0

00H

SEG3, SEG2

01H

SEG5, SEG4

02H

SEG7, SEG6

03H