EM78P568

8-bit OTP Micro-controller

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* This specification are subject to be changed without notice.

27

01/31/2004

V4.7

VDD

V1

V2

VLCD

VDD

V1

V2

VLCD

Frame

COM 0

COM1

VDD

V1

V2

VLCD

VDD

V1

V2

VLCD

SEG

SEG

dark

light

Fig.9b Type1’s LCD waveform for 1/3 bias, 1/2 duty

(Type0 or type1 is controlled by RA PAGE2 bit7)

PAGE1 (Comparator control register)

7

6

5

4

3

2

1

0

CMPEN

CMPS1

CMPS0

CMP_B4 CMP_B3 CMP_B2 CMP_B1 CMP_B0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

If user define CMP1/P63 pin, CMP2/P64 pin or CMP3/P65 pin (by CMPIN1, CMPIN2, CMPIN3 at IOCE page1)

as CMP1, CMP2 pin or CMP3 pin (comparator’s input pins), user can use this register to control comparator's

function.

Bit 0 ~ Bit 4 (CMP_B0 ~ CMP_B4) : Reference voltage selection of internal bias resistor string

Voltage = VR x ( n + 0.5 )/ 32 , n=0 to 31. Set RB bit 6 (VREF) to select VR = VREG or 2.0V

Bit 5 ~ Bit 6 (CMPS0 ~ CMPS1) : Comparator’s channel selection bits from CMP1 to CMP3

Bit 7(CMPEN) : Enable bit of the comparator circuit

0/1

disable/enable the comparator circuit

CMPS1

CMPS0

Input

0

0

CMP1

0

1

CMP2

1

0

CMP3

1

1

Reserved