EM78P568

8-bit OTP Micro-controller

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* This specification are subject to be changed without notice.

28

01/31/2004

V4.7

The relation between these registers is shown as follows in Fig.10.

Ps. VRSEL bit is in IOCA PAGE1 bit 4.

PORT62

MUX

CMP1

P62S

PORT63

MUX

CMP2

P63S

PORT64

MUX

CMP3

P64S

MUX

CMPS1

CMPS0

+

-

MUX

CMPREF

CMPFLAG

CMPEN

0

1

2

CMP1/P62

CMP2/P63

CMP3/P64

MUX

1/2R

R

R

1/2R

5

CMP_B4 to CMP_B0

11111

11110

00000

VRSEL

MUX

2.5V

ref

2.5V

REFEN

(This ckt is form DAC)

VR

VDD

Name

Register bit location

CMPEN

IOC5 PAGE1 bit 7

CMPS1 ~ CMPS0

IOC5 PAGE1 bit 6 ~ 5

CMP_B4 ~ CMP_B0

IOC5 PAGE1 bit 4 ~ 0

Name

Register bit location

CMPREF

RA PAGE0 bit 1

CMPFLAG

RA PAGE0 bit 2

Name

Register bit location

P62S

IOC6 PAGE1 bit 2

P63S

IOC6 PAGE1 bit 3

P64S

IOC6 PAGE1 bit 4

VRSEL

IOCA PAGE1 bit 4

Fig.10 The comparator circuit