CS43199 datasheet(25/111 Pages) CIRRUS

25 / 111 page

DS1113F1

CS4399

4.3 Class H Output

4.3.1

Power Supply Control Options

This section describes the two types of operation: standard Class AB and adapt-to-output signal. The set of rail voltages

supplied to the amplifier output stages depends on the ADPT_PWR (see p. 89) setting.

4.3.1.1 Standard Class AB Operation (ADPT_PWR = 001 or 010)

If ADPT_PWR is set to 001 or 010, the rail voltages supplied to the amplifiers are held to ±VP_LDO or ±VCP, respectively.

The rail voltages supplied to the output stages are held constant, regardless of the output signal level. The CS4399 outputs

simply operate in a traditional Class AB configuration.

4.3.1.2 Adapt-to-Output Signal (ADPT_PWR = 111)

If ADPT_PWR is set to 111, the rail voltage sent to the output stages is based solely on whether the signal sent to the

amplifiers would cause the amplifiers to clip when operating on the lower set of rail voltages at certain threshold values.

• If it would cause clipping, the control logic instructs the charge pump to provide the next higher set of rail voltages

to the amplifiers.

• If it would not cause clipping, the control logic instructs the charge pump to provide the lower set of rail voltages to

the amplifiers, eliminating the need to advise the CS4399 of volume settings external to the device.

4.3.2

Power-Supply Transitions

Charge-pump transitions from the lower to the higher set of rail voltages occur on the next FLYN/FLYP clock cycle. Despite

the system’s fast response time, the VCP_FILT pin’s capacitive elements prevent rail voltages from changing instantly.

Instead, the rail voltages ramp up from the lower to the higher supply, based on the time constant created by the output

impedance of the charge pump and the capacitor on the VCP_FILT pin (the transition time is approximately 20 µs).

Fig. 4-4 shows Class H supply switching. During this charging transition, a high dv/dt transient on the inputs may briefly

clip the outputs before the rail voltages charge to the full higher supply level. This transitory clipping has been found to be

inaudible in listening tests.

Figure 4-4. VCP_FILT Transitions

When the charge pump transitions from the lower to higher set of rail voltage, there is no delay associated with the

transition.

When the charge pump transitions from the higher to the lower set of rail voltages, there is an approximate 5.5-s delay

before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis ensures that the charge pump

does not toggle between the two rail voltages as signals approach the clip threshold. It also prevents clipping in the

2.Relative to digital full scale with output gain set to 0 dB.

3.In fixed modes, clipping can occur if the signal level exceeds the maximum of this range due to setting the

supply too low.

+VCP

Ideal Transition

Actual Transition caused

by VCP_FILT+ Capacitor

Time

+VP_LDO

-VCP

-VP_LDO

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