CS43199 datasheet(69/111 Pages) CIRRUS

69 / 111 page

DS1113F1

CS4399

6 Register Quick Reference

Notes: Default values are shown below the bit field names. The default values in all reserved bits must be preserved.

Table 6-1. Register Quick Reference

Address

Function

654321

0x01 0000 Device ID A and B

(Read Only)

DEVIDA

DEVIDB

p. 73

100001

0x01 0001 Device ID C and D

(Read Only)

DEVIDC

DEVIDD

p. 73

001100

0x01 0004 Revision ID (Read

Only)

AREVID

MTLREVID

p. 73

xxx

xxxxx

0x01 0005 Subrevision ID (Read

Only)

SUBREVID

p. 73

0x01 0006 System Clocking

Control

—

MCLK_INT

MCLK_SRC_SEL

p. 73

000011

0x01 0007–

0x01 000A

Reserved

—

000000

0x01 000B Serial Port Sample

Rate

—ASP_SPRATE

p. 74

000000

0x01 000C Serial Port Sample Bit

Size

—

XSP_SPSIZE

ASP_SPSIZE

p. 74

000010

0x01 000D Pad Interface

Configuration

—

XSP_3ST

ASP_3ST

p. 74

000001

0x01 000E–

0x01 FFFF

Reserved

—

000000

0x02 0000 Power Down Control

PDN_XSP

PDN_ASP

PDN_DSDIF

PDN_HP

PDN_XTAL

PDN_PLL

PDN_CLKOUT

—

p. 75

111111

0x02 0001–

0x02 0051

Reserved

—

000000

0x02 0052 Crystal Setting

—

XTAL_IBIAS

p. 75

0x02 0053–

0x03 0000

Reserved

—

000000

0x03 0001 PLL Setting 1

—

PLL_START

p. 75

000000

0x03 0002 PLL Setting 2

PLL_DIV_FRAC_0

p. 76

000000

0x03 0003 PLL Setting 3

PLL_DIV_FRAC_1

p. 76

000000

0x03 0004 PLL Setting 4

PLL_DIV_FRAC_2

p. 76

000000

0x03 0005 PLL Setting 5

PLL_DIV_INT

p. 76

100000

0x03 0006–

0x03 0007

Reserved

—

000000

0x03 0008 PLL Setting 6

PLL_OUT_DIV

p. 76

001000

0x03 0009 Reserved

—

000000

0x03 000A PLL Setting 7

PLL_CAL_RATIO

p. 76

000000

0x03 000B–

0x03 001A

Reserved

—

000000

0x03 001B PLL Setting 8

—

PLL_MODE

—

p. 77

000001

0x03 001C–

0x04 0001

Reserved

—

000000

0x04 0002 PLL Setting 9

—

PLL_REF_PREDIV

p. 77

000001

0x04 0003 Reserved

—

000000

0x04 0004 CLKOUT Control

—

CLKOUT_DIV

CLKOUT_SEL

p. 77

000000

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