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CS43199 датащи(PDF) 80 Page - Cirrus Logic |
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CS43199 датащи(HTML) 80 Page - Cirrus Logic |
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80 / 111 page ![]() 80 DS1113F1 CS4399 7.3 ASP and XSP Registers 2:0 ASP_FSD ASP frame start delay (units of ASP_SCLK periods). 000 0 delay 001 0.5 delay 010 (Default) 1.0 delay ... 101 2.5 delay 110–111 Reserved 7.3.12 XSP Numerator 1 Address 0x40020 R/W 76543210 XSP_N_LSB Default 00000001 Bits Name Description 7:0 XSP_N_LSB The value in this register cannot be changed while the serial port is powered up. XSP sample rate fractional divide numerator LSB. Along with XSP_M_MSB/LSB, selects the fractional divide value for setting the SCLK frequency. (Default) XSP_N = 1 7.3.13 XSP Numerator 2 Address 0x40021 R/W 76543210 XSP_N_MSB Default 00000000 Bits Name Description 7:0 XSP_N_MSB The value in this register cannot be changed while the serial port is powered up. XSP sample rate fractional divide numerator MSB. Along with XSP_M_MSB/LSB, selects the fractional divide value for setting the SCLK frequency. (Default) XSP_N = 1 7.3.14 XSP Denominator 1 Address 0x40022 R/W 76543210 XSP_M_LSB Default 00000010 Bits Name Description 7:0 XSP_M_LSB The value in this register cannot be changed while the serial port is powered up. XSP sample rate fractional divide denominator LSB. Along with XSP_N_MSB/LSB, selects the fractional divide value for setting the SCLK frequency. (Default) XSP_M = 2 7.3.15 XSP Denominator 2 Address 0x40023 R/W 76543210 XSP_M_MSB Default 00000000 Bits Name Description 7:0 XSP_M_MSB The value in this register cannot be changed while the serial port is powered up. XSP sample rate fractional divide denominator MSB. Along with XSP_N_MSB/LSB, selects the fractional divide value for setting the SCLK frequency. (Default) XSP_M = 2 Bits Name Description |
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