CS43130 datasheet(29/137 Pages) CIRRUS

29 / 137 page

DS1073F1

CS43130

4.3 Class H Amplifier Output

Table 4-2 shows the nominal signal and volume level ranges when the output is set to the adapt modes explained in

Section 4.3.1. If the signal level is greater than the maximum value of this range, then clipping can occur.

4.3.1

Power Supply Control Options

This section describes the two types of operation: standard Class AB and adapt-to-output signal. The set of rail voltages

supplied to the amplifier output stages depends on the ADPT_PWR (see p. 112) setting.

4.3.1.1 Standard Class AB Operation (ADPT_PWR = 001 or 010)

If ADPT_PWR is set to 001 or 010, the rail voltages supplied to the amplifiers are held to ±VP_LDO or ±VCP, respectively.

The rail voltages supplied to the output stages are held constant, regardless of the output signal level. The CS43130

amplifiers simply operate in a traditional Class AB configuration.

4.3.1.2 Adapt-to-Output Signal (ADPT_PWR = 111)

If ADPT_PWR is set to 111, the rail voltage sent to the amplifiers is based solely on whether the signal sent to the amplifiers

would cause the amplifiers to clip when operating on the lower set of rail voltages at certain threshold values.

• If it would cause clipping, the control logic instructs the charge pump to provide the next higher set of rail voltages

to the amplifiers.

• If it would not cause clipping, the control logic instructs the charge pump to provide the lower set of rail voltages to

the amplifiers, eliminating the need to advise the CS43130 of volume settings external to the device.

4.3.2

Power-Supply Transitions

Charge-pump transitions from the lower to the higher set of rail voltages occur on the next FLYN/FLYP clock cycle. Despite

the system’s fast response time, the VCP_FILT pin’s capacitive elements prevent rail voltages from changing instantly.

Instead, the rail voltages ramp up from the lower to the higher supply, based on the time constant created by the output

impedance of the charge pump and the capacitor on the VCP_FILT pin (the transition time is approximately 20 µs).

Fig. 4-4 shows Class H supply switching. During this charging transition, a high dv/dt transient on the inputs may briefly

clip the outputs before the rail voltages charge to the full higher supply level. This transitory clipping has been found to be

inaudible in listening tests.

Figure 4-4. VCP_FILT Transitions

Table 4-2. Class H Supply Modes

Mode

Class H Supply Level

Signal 1 or Volume Level Range 2,3,4

1.In adapt-to-signal, the volume level ranges are approximations but are within –0.5 dB from the values shown.

2.Relative to digital full scale with output gain set to 0 dB.

3.In fixed modes, clipping can occur if the signal level exceeds the maximum of this range due to setting the

amplifier’s supply too low.

4.Thresholds shown are nominal for a 16-Ω stereo load.

±VP_LDO V, internally regulated from VP

 –11 dB

±VCP

< –11 dB

+VCP

Ideal Transition

Actual Transition caused

by VCP_FILT+ Capacitor

Time

+VP_LDO

-VCP

-VP_LDO

CS43130 датащи(PDF) 29 Page - Cirrus Logic

CS43130 датащи(HTML) 29 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL