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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CS43130 датащи(PDF) 95 Page - Cirrus Logic |
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CS43130 датащи(HTML) 95 Page - Cirrus Logic |
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95 / 137 page  DS1073F1 95 CS43130 7 Register Descriptions 7 Register Descriptions All registers are read/write, except for the device’s ID, revision, and status registers, which are read only. The following tables describe bit assignments. The default state of each bit after a power-up sequence or reset is listed in each bit description. All reserved bits must maintain their default state. 7.1 Global Registers 7.1.1 Device ID A and B Address 0x10000 R/O 76543210 DEVIDA DEVIDB Default 01000011 Bits Name Description 7:4 DEVIDA Part number first digit: 4 3:0 DEVIDB Part number second digit: 3 7.1.2 Device ID C and D Address 0x10001 R/O 76543210 DEVIDC DEVIDD Default 00010011 Bits Name Description 7:4 DEVIDC Part number third digit: 1 3:0 DEVIDD Part number fourth digit: 3 7.1.3 Device ID E Address 0x10002 R/O 76543210 DEVIDE — Default 00000000 Bits Name Description 7:4 DEVIDE Part number fifth digit: 0 3:0 — Reserved 7.1.4 Revision ID Address 0x10004 R/O 76543210 AREVID MTLREVID Default xxxxxxxx Bits Name Description 7:4 AREVID Alpha revision. AREVID and MTLREVID form the complete device revision ID (e.g., A0, B2). 3:0 MTLREVID Metal revision. AREVID and MTLREVID form the complete device revision ID (e.g., A0, B2). 7.1.5 Subrevision ID Address 0x10005 R/O 76543210 SUBREVID Default xxxxxxxx Bits Name Description 7:0 SUBREVID Subrevision level. |
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