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CS35L32 датащи(PDF) 36 Page - Cirrus Logic |
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CS35L32 датащи(HTML) 36 Page - Cirrus Logic |
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36 / 51 page ![]() 36 DS963F5 CS35L32 7 Register Descriptions 7 Register Descriptions All registers are read/write except for the chip ID and revision register and the status registers, which are read only. The user must not change reserved registers from their default state. 7.1 Device ID A and B Address 0x01 R/O 7 654 32 10 DEVIDA[3:0] DEVIDB[3:0] Default 0 011 01 01 7.2 Device ID C and D Address 0x02 R/O 7 654 32 10 DEVIDC[3:0] DEVIDD[3:0] Default 1 010 00 11 7.3 Device ID E Address 0x03 R/O 7 654 32 10 DEVIDE[3:0] — Default 0 010 00 00 Bits Name Description 7:4 DEVIDA, DEVIDC, DEVIDE Device ID code for the CS35L32. DEVIDA 0x3 DEVIDB 0x5 DEVIDC 0xA Represents the “L” in CS35L32 . DEVIDD 0x3 DEVIDE 0x2 3:0 DEVIDB, DEVIDD 7.4 Revision ID Address 0x05 R/O 7 654 32 10 AREVID[3:0] NUMREVID[3:0] Default x xxx xx xx Bits Name Description 7:4 AREVID Alpha revision. AREVID and NUMREVID form the complete device revision ID (e.g., A0, B2). 0xA A … 0xF F 3:0 NUMREVID Numerical revision. AREVID and NUMREVID form the complete device revision ID (e.g., A0, B2). 0x0 0 … 0xF F 7.5 Power Control 1 Address 0x06 R/W 7 654 32 10 PDN_AMP — PDN_BST[1:0] — PDN_ALL Default 0 000 01 00 Bits Name Description 7 PDN_ AMP Power down Class D amplifier. Configures the power state of the Class D amplifier. 0 (Default) Powered up 1 Powered down 6:4 — Reserved 3:2 Power-down boost converter. Configures the power state of the boost converter. 00 Powered up 01 (Default) Boost Mode bypass. Turns the boost FET OFF, the rectifying FET ON, and the remaining boost circuitry in a low- power state, with VBST = VP. Powers down internal-control circuitry when operating in VBST = VP Mode. 10–11 Reserved 1— Reserved 0PDN_ ALL Power down all. Configures the CS35L32 power state. Can be used to quickly power down the device but is not equivalent to using all of the individual power-down bits. 0 (Default) Powered up, as per individual controls in power control registers 1 and 2. 1 Powered down. All affected blocks are powered down, regardless of individual power-down bit settings. |
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