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CS35L32 датащи(PDF) 9 Page - Cirrus Logic |
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CS35L32 датащи(HTML) 9 Page - Cirrus Logic |
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9 / 51 page ![]() DS963F5 9 CS35L32 3 Characteristics and Specifications Table 3-4. Boost Converter Characteristics Test conditions, except where noted otherwise: VA = 1.8 V, VP = 3.6 V, VBST = 5.0 V, amp gain = 12 dB, GNDA = GNDP = 0 V, TA = +25°C , MCLKINT = 6 MHz. MCLKINT is explained in Section 4.13.1 and Section 7.7. Parameters Symbol Test Conditions Min Typical Max Units Boost output voltage VBST Boosting Bypass VP*1.15 — — VP 5.4 — V V Boost output voltage tolerance VBST No load: ILOAD =0 mA –5 — +5 % Load regulation V(Load) 3.0 V < VP < 4.2 V; ILOAD= 0.25A to1.5 A — 60 — mV/A Line regulation V(Line) 3.0 V<VP<4.2 V; ILOAD = 0 A, 500 mA — 40 — mV/V Boost FET peak-current limit (See Section 7.10.) IMAX(B) BST_IPK = 0000 0000 BST_IPK = 0010 0000 BST_IPK = 0100 0000 BST_IPK = 0110 0000 BST_IPK = 1000 0000 — — — — — 2.89 3.30 3.72 4.14 4.56 — — — — — A A A A A Output switching frequency 1 1.MCLKDIV2 (see p. 37) should be configured so MCLKINT is 6 or 6.1440 MHz (see Table 4-14) for boost-converter operation at 2 or 2.05 MHz. fSW(B) —— MCLKINT/3 — MHz Boost FET ON resistance RDS(ON)B IOUT(B) = 1 A — 80 — m Boost FET ON resistance temp coefficient — IOUT(B) = 1 A — 0.2 — %/oC Rectifying FET ON resistance RDS(ON)R IOUT(B) = 1 A — 150 — m Rectifying FET ON resistance temp coefficient IOUT(B) = 1 A — 0.2 — %/oC Overvoltage detection threshold VOVTH Boost enabled — 5.5 5.7 V Threshold Class G On, IN+ to IN– VIN1THON VBST = VP = 3.6 V — 0.60 — V Threshold Class G Off, IN+ to IN– VIN1THOF VP = 3.6 V, VBST = 5 V — 0.33 — V Minimum Class G boost ON hold-off time — VP = 3.6 V, VBST = 5 V — 8002 2.Minimum Class G boost ON hold-off time is determined from when the low audio detection is latched until when the boost is turned off. The latching mechanism occurs in 800-ms intervals. If the audio level is detected as low between two sequential latches, the hold-off time is extended by the difference between when the detection occurs and the subsequent latch pulse. This may extend the hold-off time up to 1.6 s in extreme cases. —ms Operating efficiency 3 3.Efficiency specified here assumes the boost converter drives an external resistive load via the VBST pin, instead of the onboard Class D amplifier. B VBST = 5 V, IOUT(B) = 500 mA VBST = 5 V, IOUT(B) =1.5 A — — 90 85 — — % % Table 3-5. LED Drive Characteristics Test conditions, except where noted otherwise: VA = 1.8 V, VP = 3.6 V, VBST = 5.0 V, GNDA = GNDP = GNDPLED = 0 V, TA = +25°C . Parameters Min Typical Max Units Flash Mode current settings, per LED 1 (Step size = 50 mA) 1.Flash or Movie Mode current is delivered from the boost converter’s output, which provides a voltage higher than the LED voltage. Depending on the LED voltage requirement and on VP supply voltage, the boost converter is internally controlled to boost or be in bypass (rectifying FET fully on). LED_FLCUR = 1111 … LED_FLCUR = 0001 — … — 750 … 50 — … — mA … mA Flash Inhibit Mode current settings, per LED 1 (Step size = 50 mA) LED_FLINHCUR = 0111 … LED_FLINHCUR = 0001 — … — 350 … 50 — … — mA … mA Movie Mode current settings, per LED 1 LED_MVCUR = 111 LED_MVCUR = 110 LED_MVCUR = 101 LED_MVCUR = 100 LED_MVCUR = 011 LED_MVCUR = 010 LED_MVCUR = 001 — — — — — — — 150 120 100 80 60 40 20 — — — — — — — mA mA mA mA mA mA mA LED current accuracy –10 — +10 % LED current matching —10— % Flash timer (tflash) MCLKINT = 6 MHz 2; TIMER = 1 0010–1 1111 TIMER = 0 0001 TIMER = 0 0000 MCLKINT = 6.144 MHz; TIMER = 1 0010–1 1111 TIMER = 0 0001 TIMER = 0 0000 2.The flash time setting is generated from MCLKINT. MCLKDIV2 (see p. 37) should be configured so MCLKINT is 6 or 6.1440 MHz. See Table 4-14. — — — — — — 500 75 50 488.3 73.2 48.8 — — — — — — ms ms ms ms ms ms LED flash timer accuracy 0— +1 ms LED flash inhibit time (FLINH high to LED current 3% settling) — 40 — s |
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