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CS35L32 датащи(PDF) 31 Page - Cirrus Logic

номер детали CS35L32
подробное описание детали  Boosted Class D Amplifier with Speaker-Protection Monitoring and Flash LED Drivers
PDF  51 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS35L32 датащи(HTML) 31 Page - Cirrus Logic

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CS35L32
4.14 Control Port Operation
Figure 4-11. Control-Port Timing—I2C Writes with Autoincrement
The logic state of FLOUT2/AD0 configures the I²C device address upon a device power up, after RESET has been
deasserted. The bit labeled AD0 in the address byte in Fig. 4-11 reflects the logic state of pin FLOUT2/AD0.
If the I²C operation is a write, the next byte is the memory address pointer (MAP); the 7 LSBs of the MAP byte select the
address of the register to be read or written to next. The MSB of the MAP byte, INCR, selects whether autoincrementing
is to be used (INCR = 1), allowing successive reads or writes of consecutive registers.
Each byte is separated by an acknowledge bit, ACK, which the CS35L32 outputs after each input byte is read and is input
to the CS35L32 from the microcontroller after each transmitted byte.
Also for writes, bytes following the MAP byte are written to the CS35L32 register addresses pointed to by the last received
MAP address plus however many autoincrements have occurred. Fig. 4-11 shows a write pattern with autoincrementing.
If the operation is a read, the contents of the register pointed to by the last received MAP address plus however many
autoincrements have occurred, are output in the next byte. Fig. 4-12 shows a read pattern following the write pattern in
Fig. 4-11. Notice how read addresses are based on the MAP byte from Fig. 4-11.
Figure 4-12. Control-Port Timing—I²C Reads with AutoIncrement
If a read address different from that based on the last received MAP address is desired, an aborted write operation can
be used as a preamble that sets the desired read address. This preamble technique is shown in Fig. 4-11, in which a write
operation is aborted (after the ACK for the MAP byte) by sending a stop condition.
Figure 4-13. Control-Port Timing—I²C Reads with Preamble and Autoincrement
The following pseudocode illustrates an aborted write operation followed by a single read operation when the AD0 bit in
the slave address is 0. For multiple read operations, autoincrement would be set to ON (as shown in Fig. 4-13).
Send start condition.
Send 10000000 (chip address and write operation).
Receive acknowledge bit.
Send MAP byte, autoincrement off.
4
5
6
7
24 25
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA
START
STOP
ACK
ACK
SDA
7
6
1
0
0
1
2
3
8
9
12
16 17 18 19
10 11
13 14 15
27 28
26
DATA
SDA
Source
Master
Master
Master
Pullup
Slave
Slave
Slave
Slave
Master
Pullup
ACK
ACK
1
x
x
x
x
x
x
x
MAP Addr
Slave Address
1
0
0
0
0
0
x
0
Data to
Addr X+1
Data to
Addr X+n
Master
Master
Slave
Data to
Addr X
7
6
1
0
7
6
1
0
SCL
DATA
STOP
ACK
ACK
SDA
7
0
7
0
CHIP ADDRESS (READ)
START
7
0
NO
25
8
9
18
4
5
6
7
0
1
2
3
16 17
34 35 36
ACK
Slave Address
1
0
0
0
0
0
x
1
DATA
DATA
Data from
Addr X+n+1
Data from
Addr X+n+2
Data from
Addr X+n+3
SDA
Source
Master
Pullup
Slave
Slave
Slave
Master
Master
Master Pullup
27
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
START
ACK
STOP
ACK
ACK
ACK
SDA
7
0
7
0
CHIP ADDRESS (READ)
START
1
x
x
x
x
x
x
x
7
0
NO
16
8
9
12 13 14 15
4
5
6
7
0
1
20 21 22 23 24
26 27 28
2
3
10 11
17 18 19
25
ACK
STOP
MAP Addr = Z
Slave Address
1
0
0
0
0
0
x
0
Slave Address
1
0
0
0
0
0
x
1
DATA
DATA
Data from
Addr Z
Data from
Addr Z+1
Data from
Addr Z+n
SDA
Source
Master
Master
Master
Pullup
Slave
Slave
Slave
Slave
Slave
Master
Master
Master
Pullup



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