HT68F005 datasheet(38/93 Pages) HOLTEK

38 / 93 page

Rev. 1.00

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Rev. 1.00

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HT68F005/HT68F006

Enhanced I/O Flash Type MCU

HT68F005/HT68F006

Enhanced I/O Flash Type MCU

Entering the SLEEP1 Mode

ThereisonlyonewayforthesedevicestoentertheSLEEP1Modeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“0”andthe

WDTon.Whenthisinstructionisexecutedundertheconditionsdescribedabove,thefollowingwill

occur:

• ThesystemclockandTimeBaseclockwillbestoppedandtheapplicationprogramwillstopatthe

“HALT”instruction,buttheWDTwillremainwiththeclocksourcecomingfromthefLIRCclock.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTclocksourceisselectedtocomefrom

thefLIRCclockastheWDTisenabled.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

Entering the IDLE0 Mode

ThereisonlyonewayforthesedevicestoentertheIDLE0Modeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“1”andthe

FSYSONbitinCTRLregisterequalto“0”.Whenthisinstructionisexecutedundertheconditions

describedabove,thefollowingwilloccur:

• Thesystemclockwillbestoppedandtheapplicationprogramwillstopatthe“HALT”

instruction,buttheTimeBaseclockandfLIRCclockwillbeon.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTclocksourceisselectedtocomefrom

thefLIRCclockandtheWDTisenabled.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

Entering the IDLE1 Mode

ThereisonlyonewayforthesedevicestoentertheIDLE1Modeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“1”andthe

FSYSONbitinCTRLregisterequalto“1”.Whenthisinstructionisexecutedundertheconditions

describedabove,thefollowingwilloccur:

• ThesystemclockandTimeBaseclockandfSUBclockwillbeonandtheapplicationprogramwill

stopatthe“HALT”instruction.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecountingiftheWDTisenabled.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

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