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AD9286BCPZ-500 датащи(PDF) 25 Page - Analog Devices

номер детали AD9286BCPZ-500
подробное описание детали  8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter (ADC)
PDF  28 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9286BCPZ-500 датащи(HTML) 25 Page - Analog Devices

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AD9286
Data Sheet
Addr
(Hex)
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Default
Notes/
Comments
0x0F
ADC input
(global/local)
Open
Analog
disconnect
(local)
Common-
mode
input
enable
(global)
Open
0x02
0x10
Offset (local)
Open
Offset adjust (twos complement format)
0111: +7
0110: +6
…
0001: +1
0000: 0
1111: −1
…
1001: −7
1000: −8
0x00
Device
offset trim
0x14
Output
mode (local)
Open
Output
enable
Open
Output
invert
Data format select
00: offset binary
01: twos complement
10: Gray code
11: reserved
0x00
Configures
the outputs
and the
format of
the data
0x16
Output
phase
(global)
DCO invert
Open
0x00
0x18
Voltage
reference
(global)
Open
Voltage reference and input full-scale adjustment (see Table 14)
0x00
Selects/
adjusts VREF
0x24
MISR LSB
(local)
LSBs of multiple input shift register (MISR)
0x00
MISR least
significant
byte; read
only
0x25
MISR MSB
(local)
MSBs of multiple input shift register (MISR)
0x00
MISR most
significant
byte; read
only
0x37
Timing
adjust (local)
Open
Fine timing skew
0000: 0.0 ps
0001: 0.075 ps
…
1111: 1.125 ps
0x00
Determines
the clock
delay that is
introduced
into the
sampling
path
0x38
Open
Coarse timing skew
0000: 0.0 ps
0001: 1.2 ps
…
1111: 18 ps
0x00
Determines
the clock
delay that is
introduced
into the
sampling
path
Rev. C | Page 24 of 27



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