DSM2190F4V datasheet(15/61 Pages) STMICROELECTRONICS

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DSM2190F4

RUNTIME CONTROL REGISTER DEFINITION

There are up to 256 addresses decoded inside the

DSM device for control and status information. 27

of these locations contain registers that the DSP

can access at runtime. The base address of this

block of 256 locations is referred to in this manual

csiop (Chip Select I/O Port). Table 4 lists the 27

registers and their offsets (in hexadecimal) from

the

csiop base address needed to access individ-

ual DSM control and status registers. The DSP will

access these registers in I/O memory space using

its IOMS strobe. These registers are accesses in

bytes, so the DSP should ignore the upper byte of

its 16-bit I/O access.

Note1: All

csiop registers are cleared to logic 0 at

reset.

Note2: Do not write to unused locations within the

csiop block of 256 registers. They should remain

logic zero.

Table 4.

CSIOP Registers and their Offsets (in hexadecimal)

Port B

Port C

Port D

Other

Description

Data In

MCUI/O input mode. Read to obtain current logic level of

Port pins. No writes.

Data Out

MCU I/O output mode. Write to set logic level on Port

pins. Read to check status.

Direction

MCU I/O mode. Configures Port pin as input or output.

Write to set direction of Port pins.

Logic 1 = out, Logic 0 = in. Read to check status.

Drive Select

Write to configure Port pins as either standard CMOS or

Open Drain on some pins, while selecting high slew rate

on other pins. Read to check status.

Input Macrocells

Read to obtain state of IMCs. No writes.

Enable Out

Read to obtain the status of the output enable logic on

each I/O Port driver. No writes.

Output Macrocells AB

Read to get logic state of output of OMC bank AB.

Write to load registers of OMC bank AB.

Output Macrocells BC

Read to get logic state of output of OMC bank BC.

Write to load registers of OMC bank BC.

Mask Macrocells AB

Write to set mask for loading OMCs in bank AB. A logic

1 in a bit position will block reads/writes of the

corresponding OMC. A logic 0 will pass OMC value.

Read to check status.

Mask Macrocells BC

Write to set mask for loading OMCs in bank BC. A logic

1 in a bit position will block reads/writes of the

corresponding OMC. A logic 0 will pass OMC value.

Read to check status.

Main Flash Sector

Protection

Read to determine Main Flash Sector Protection

Setting. No writes.

Security Bit and

Secondary Flash

Sector Protection

Read to determine if DSM devices Security Bit is active.

Logic 1 = device secured.

Also read to determine Secondary Flash Protection

Setting status. No Writes.

JTAG Enable

Write to enable JTAG Pins (optional feature). Read to

check status.

PMMR0

Power Management Register 0. Write and read.

PMMR2

Power Management Register 2. Write and read.

Page

Memory Page Register. Write and read.

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