поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

ST72561J4-Auto датащи(PDF) 106 Page - STMicroelectronics

номер детали ST72561J4-Auto
подробное описание детали  Clock, reset and supply management
PDF  324 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561J4-Auto датащи(HTML) 106 Page - STMicroelectronics

Back Button ST72561J4-Auto Datasheet HTML 102Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 103Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 104Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 105Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 106Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 107Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 108Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 109Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 110Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 106 / 324 page
background image
16-bit timer
ST72561-Auto
106/324
Doc ID 12370 Rev 8
Figure 47.
Timer block diagram
Figure 48.
16-bit read sequence: (from counter or alternate counter register)
MCU-PERIPHERAL INTERFACE
COUNTER
ALTERNATE
OUTPUT
COMPARE
REGISTER
OUTPUT COMPARE
EDGE DETECT
OVERFLOW
DETECT
CIRCUIT
1/2
1/4
1/8
8-bit
buffer
ST7 INTERNAL BUS
LATCH1
OCMP1
ICAP1
EXTCLK
fCPU
TIMER INTERRUPT
ICF2
ICF1
TIMD
0
0
OCF2
OCF1 TOF
PWM
OC1E
EXEDG
IEDG2
CC0
CC1
OC2E OPM
FOLV2
ICIE
OLVL1
IEDG1
OLVL2
FOLV1
OCIE TOIE
ICAP2
LATCH2
OCMP2
8
8
8 low
16
8 high
16
16
16
16
(Control Register 1) CR1
(Control Register 2) CR2
(Control/Status Register)
6
16
8
8
8
8
8
8
EXEDG
TIMER INTERNAL BUS
CIRCUIT1
EDGE DETECT
CIRCUIT2
CIRCUIT
1
OUTPUT
COMPARE
REGISTER
2
INPUT
CAPTURE
REGISTER
1
INPUT
CAPTURE
REGISTER
2
CC[1:0]
COUNTER
pin
pin
pin
pin
pin
REGISTER
REGISTER
Note: If IC, OC and TO interrupt requests have separate vectors
then the last OR is not present (See device Interrupt Vector Table)
(See note)
CSR
is buffered
Read
At t0
Read
Returns the buffered
LS Byte value at t0
At t0 +
Δt
Other
instructions
Beginning of the sequence
Sequence completed
LS Byte
LS Byte
MS Byte



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com