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ST10F296 датащи(PDF) 201 Page - STMicroelectronics

номер детали ST10F296
подробное описание детали  High performance 16-bit CPU with DSP functions
PDF  346 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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ST10F296 датащи(HTML) 201 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST10F296E
CAN modules
201/346
17.7.1
Example of bit timing at high baud rate
In this example, the CPU frequency (CAN module clock) is 10 MHz, BRP is 0, and the bit
rate is 1 Mbit/s.
tq
100 ns = tCPU
Delay of bus driver
50 ns
Delay of receiver circuit
30 ns
Delay of bus line (40 m)
220 ns
tProp
600 ns = 6 x tq
tSJW
100 ns = 1 x tq
tPB1
100 ns = 1 x tq
tSeg1 = tProp + tPB1
700 ns = 7 x tq
tSeg2 = tPB2
200 ns = Information processing time + 1 x tq = 2 x tq
tSync-Seg
100 ns = 1 x tq
tBT
1000 ns = tSync-Seg + tSeg1 + tSeg2 = 10 x tq
Tolerance for CAN clock
0.39 % =
δPLL (13 x tBT = 13 x 10 x tq = 130 tCPU 5 ns = Data from PLL jitter characteristics
Tolerance for oscillator (no PLL effect)0.35% =
In this example, the concatenated bit time parameters are (2-1)3 & (7-1)4 & (1-1)2 & (1-1)6,
the bit timing register CANxBTR is programmed to = 0x1600h.
min t
PB1 tPB2
,
()
13
t
BT
×
t
PB2
()
÷
0.1
µs
() 213 1 µs
() 0.2 µs
()
×
()
×
=
min t
PB1 tPB2
,
() 2 δ
PLL
×
213
t
BT
×
t
PB2
()
×
Obsolete
Product(s)
- Obsolete
Product(s)



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