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STV2050A датащи(PDF) 51 Page - STMicroelectronics |
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STV2050A датащи(HTML) 51 Page - STMicroelectronics |
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51 / 83 page ![]() 51/83 STV2050A - CONVERGENCE The STV2050A can generate a special convergence signal (cursor) controlled by the GCD bit in the E3 register. TThe cursor action is selected by the DHV bit in the E3 register. During field offset measuring lines, the values applied to the DACs for each channel are given by the MVR[7:0] bits for red, MVG[7:0] bits for green and MVB[7:0] bits for blue in the E8 reg- ister. In vertical cursor mode, the resulting values applied to the DACs are first positive, then in- verted on the following TV line. In horizontal mode, the values are inverted at each TV line. Figure 27. Gain Cursors When using this mode, the STV2050A must be correctly set in order to recognize the inter- laced field. The IIE bit in the DA register must be set to 1. 9.8 CONVERGENCE OUTPUTS The values of the six convergence channels are converted by 14-bit DACs with a differential current output. GCD 0 = Cursor Off 1 = Cursor On DHV 0 = Horizontal Cursor 1 = Vertical Cursor n’ -A +A Vertical Gain Adjustment Horizontal Gain Adjustment n’ n’+4 n’+2 n’+1 n’+3 n+1 n+3 n n+4 n+2 - A + A n+5 Middle of Video Grid (Odd) n n+1 (Even) (Even) (Even) (Even) (Odd) |
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