STV2050A datasheet(35/83 Pages) STMICROELECTRONICS

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STV2050A - VIDEO PATTERN GENERATOR

7.2 CROSS-HATCH GRID

The convergence values are adjusted and stored for an array of 16 x 13 points. These points

can be displayed by the grid lines of the video generator. The deflection correction at the grid

points corresponds to the digitally stored values. Several programming features are used to

adapt the grid, and therefore the convergence adjustment, to the needs of the application. All

parameters for the grid are included in the data set stored in the internal RAM.

7.2.1 Horizontal Grid Adjustment

The horizontal distance of the grid lines is determined by the values of the HGD[5:0] and

HRD[5:0] bits in the D8 register. Refer to Figure 17 "Horizontal Grid Adjustment" on page 35.

Between each grid line, a minimum of 16 system clock cycles is required for calculating the

convergence. (Refer to Section 5.1 "LINE LOCKED PLL AND SYSTEM CLOCK" on page 22).

The geometrical distance between two vertical grid lines can be modified by adding clock cy-

cles between the visible grid lines (HGD) or by adding clock cycles during the horizontal re-

trace (HRD).

– HGD: horizontal grid distance during active line.

– HRD: horizontal grid distance during line retrace.

The left-right position is controlled by the HGP[6:0] bits in the D7 register.

Figure 17. Horizontal Grid Adjustment

7.2.2 Vertical Grid Adjustment

In the same way, the vertical grid adjustment is done using the VGP[8:0] and VGD[5:0] bits in

the D9 register.

910

Retrace

H-Flyback

HSYNC

Grid

(HGP=0)

Retrace

Grid

(HGP>0)

HGP

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