STV2050A datasheet(62/83 Pages) STMICROELECTRONICS

номер детали	STV2050A

подробное описание детали	AUTOMATIC MULTISCAN DIGITAL CONVERGENCE PROCESSOR

PDF	83 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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STV2050A - SECURITIES

14 SECURITIES

14.1 OVERVIEW

The STV2050A can prevent overcurrents in the convergence coils, or poor programming,

using the following controls:

– At power-on reset, or after a reset, all analog outputs are disabled, and the STV2050A waits

until at least 2 pulses of each horizontal and vertical signals are received.

– As long as the internal set-up is not achieved, the outputs remain disabled. The setup dura-

tion is typically 2 field periods.

– When setup is achieved, the DAC outputs are not fully released and the values are reduced

50% during one field.

– The transfer between EEPROM and embedded RAM of the data stored in register E9 is pro-

tected by a Hamming code.

– During normal operating mode, each convergence value stored in the embedded RAM is

checked by a parity checker before it is applied to the DACs. If a parity error occurs, the S19

bit in the E3, E4, E5 and E9 resisters are set as follows.

An error flag is available in read mode through the slave I²C BUS.

14.2 HAMMING ENCODING

The E9 register contains certain values which are protected by a Hamming code: :EEPRO-

Madd[2:0], ADS[1:0] and RWM[2:0]. The Hamming code is stored in the HAM[3:0] bits in the

E9 register.

S19

0: Parity OK

1: Parity error

MSB

LSB

D0 BYTE

D1 BYTE

D2 BYTE

ADD

EEPRO-

Madd [2:0]

ADS[

1:0]

RWM [2:0]

HAM[3:0]

STV2050A датащи(PDF) 62 Page - STMicroelectronics