STA333IS datasheet(37/43 Pages) STMICROELECTRONICS

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STA333IS

5.12

Short-circuit protection registers SHOKx (addr 0x35, 0x37,

0x38)

The following power bridge pin short-circuit protections are implemented in the STA333IS:

•

OUTxx vs GNDx

•

OUTxx vs VCCx

•

OUT1B vs OUT2A

The protection is enabled when reg. 0x35 bit 1 (ENABLE_SH) is set to ‘1’. The protection

will check the short-circuit when the EAPD bit is toggled from ‘0’ to ‘1’ (i.e. the power bridge

is switched on), and only if the test passes (no short) does the power bridge leave the

tristate condition.

type. SHGNDxx equal to ‘0’ means that OUTxx is shorted to ground, while the same value

on SHVCCxx means that OUTxx is shorted to Vcc, and finally SHOUT=’0’ means that

OUT1B is shorted to OUT2A. To be noted that once the check is performed and the tristate

released, the short protection is no longer active until the next EAPD 0->1 toggling, which

means that shorts that occurred during normal operation cannot be detected. To be noted

that registers 0x37 and 0x38 are meaningful only after the EAPD bit is set to ‘1’ at least

once.

The short-circuit protections implemented are effective only in BTL configuration, and they

must not be activated if a single-ended application scheme is needed.

Figure 10. Short-circuit protection timing diagram

reserved

ENABLE_SH

reserved

0 (default)

SHGND1A

SHGND1B

SHGND2A

SHGND2B

SHVCC1A

SHVCC1B

SHVCC2A

SHVCC2B

reserved

SHOUT

EAPD

OUT1A

OUT1B

OUT2A

OUT2B

SHOK1[7:4]

SHOK1[3:0]

SHOK2[0]

cycles

50005 cy c les

50005 cy cles

1c yc le

Start o ut test

TBD c yc les

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