поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STA333IS датащи(PDF) 28 Page - STMicroelectronics

номер детали STA333IS
подробное описание детали  100 dB SNR and dynamic range
PDF  43 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA333IS датащи(HTML) 28 Page - STMicroelectronics

Back Button STA333IS Datasheet HTML 24Page - STMicroelectronics STA333IS Datasheet HTML 25Page - STMicroelectronics STA333IS Datasheet HTML 26Page - STMicroelectronics STA333IS Datasheet HTML 27Page - STMicroelectronics STA333IS Datasheet HTML 28Page - STMicroelectronics STA333IS Datasheet HTML 29Page - STMicroelectronics STA333IS Datasheet HTML 30Page - STMicroelectronics STA333IS Datasheet HTML 31Page - STMicroelectronics STA333IS Datasheet HTML 32Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 43 page
background image
Register description
STA333IS
28/43
DocID022855 Rev 3
Zero-crossing volume enable
The ZCE bit enables zero-crossing volume adjustments. When the volume is adjusted on
digital zero-crossings, no clicks will be audible.
Soft volume update enable
5.1.6
Configuration register F (addr 0x05)
Invalid input detect mute enable
Setting the IDE bit enables this function, which looks at the input I2S data and will
automatically mute if the signals are perceived as invalid.
Binary output mode clock loss detection
The BCLE bit detects loss of input MCLK in binary mode and outputs 50% of the duty cycle.
Table 31. Zero-crossing volume enable
Bit
R/W
RST
Name
Description
6R/W
1
ZCE
1: volume adjustments will only occur at digital zero-crossings
0: volume adjustments will occur immediately
Table 32. Zero-crossing volume enable
Bit
R/W
RST
Name
Description
7R/W
1SVE
1: volume adjustments ramp according to SVR settings
0: volume adjustments will occur immediately
D7
D6
D5
D4
D3
D2
D1
D0
EAPD
PWDN
ECLE
LDTE
BCLE
IDE
Reserved
01
0
1
1
1
0
0
Table 33. Invalid input detect mute enable
Bit
R/W
RST
Name
Description
2
R/W
1
IDE
1: enables the automatic invalid input detect mute
Table 34. Binary output mode clock loss detection
Bit
R/W
RST
Name
Description
3
R/W
1
BCLE
Binary output mode clock loss detection enable



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com