STA333IS datasheet(22/43 Pages) STMICROELECTRONICS

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STA333IS

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DocID022855 Rev 3

Thermal warning adjustment bypass

The on-chip STA333IS power output block provides feedback to the digital controller using

inputs to the power control block. The TWARN input is used to indicate a thermal warning

condition. When TWARN is asserted (set to 0) for a period of time greater than 400 ms, the

power control block will force a -3 dB output limit (determined by TWOCL in coefficient

RAM) to the modulation limit in an attempt to eliminate the thermal warning condition. Once

the thermal warning output limit adjustment is applied, it remains in this state until reset

unless FDRB = 0.

Fault-detect recovery bypass

The on-chip STA333IS power output block provides feedback to the digital controller using

inputs to the power control block. The FAULT input is used to indicate a fault condition

(either overcurrent or thermal). When FAULT is asserted (set to 0), the power control block

attempts a recovery from the fault by asserting the 3-state output (setting it to 0 which

directs the power output block to begin recovery), holding it at 0 for period of time in the

range of 0.1 ms to 1 second as defined by the fault-detect recovery constant register (FDRC

registers 0x2B, 0x2C), then toggling it back to 1. This sequence is repeated as long as the

fault indication exists. This feature is enabled by default but can be bypassed by setting the

FDRB control bit to 1.

5.1.2

Configuration register B (addr 0x01)

Table 14. Thermal warning adjustment

Bit

R/W

RST

Name

Description

6R/W

1TWAB

Thermal warning adjustment bypass:

0: thermal warning adjustment enabled

1: thermal warning adjustment disabled

Table 15. Fault-detect recovery

Bit

R/W

RST

Name

Description

7R/W

0FDRB

Fault-detect recovery bypass:

0: fault-detect recovery enabled

1: fault-detect recovery disabled

C2IM

C1IM

Reserved

SAIFB

SAI3

SAI2

SAI1

SAI0

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