FREQ datasheet(14/56 Pages) FUJITSU

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MB39A214A

Limitation : development tool vendor use only

FUJITSU SEMICONDUCTOR CONFIDENTIAL

DS405-00007-1v0-E

(1) Bias Voltage Block (VB Reg.)

The 5.2 V (Typ) bias voltage is generated from the VCC pin voltage for the control, output, and boost

circuits. When either or both of the EN1 pin (pin 2) and EN2 pin (pin 11) are set to the “H” level, the

system is restored from the standby state to supply the bias voltage from the VB pin (pin 18).

(2) ON/OFF Time Generator Block (tON Generator)

This block contains a capacitor for timing setting and a resistor for timing setting and generates ON time

(tON) which depends on input voltage and output voltage. The switching frequency can be switched by

setting the FREQ pin (pin 7) to any one of GND connection, OPEN, and VB connection. ON time for each

CH is obtained from the following formula.

VVOUT1

tON1 (ns) =

VVIN

4300 (fOSC1

230 kHz)

VVOUT2

tON2 (ns) =

VVIN

3200 (fOSC2

310 kHz)

VVOUT1

tON1 (ns) =

VVIN

2100 (fOSC1

460 kHz)

VVOUT2

tON2 (ns) =

VVIN

1600 (fOSC2

620 kHz)

VVOUT1

tON1 (ns) =

VVIN

1300 (fOSC1

750 kHz)

VVOUT2

tON2 (ns) =

VVIN

1000 (fOSC2

1000 kHz)

The switching frequency of CH2 is set to 1.33 times that of CH1 to prevent the beat by the frequency

difference of channel to channel.

(3) Output Block (DRV1, DRV2)

The output circuit is configured in CMOS type for both of the high-side and the low-side. It provides the

0.5 A (Typ) source current and 0.9 A (Typ) sink current, drive the external N-ch MOS FET. The output

circuit of the high-side FET supplies the power from the boost circuit including the built-in boost diode. The

output circuit of the low-side FET supplies the power from the VB pin. This circuit monitors the gate

voltages of the high-side and low-side FETs. Until either FET is turned off, this circuit controls the ON

timing of another FET, preventing the shoot-through current. The sink ON resistance of the output circuit is

low 1 Ω (Typ), improve the self turn on margin of low-side FET.

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