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DS2196 датащи(PDF) 46 Page - Dallas Semiconductor

номер детали DS2196
подробное описание детали  T1 Dual Framer LIU
PDF  157 Pages
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производитель  DALLAS [Dallas Semiconductor]
домашняя страница  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2196 датащи(HTML) 46 Page - Dallas Semiconductor

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DS2196
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CCR5A: COMMON CONTROL REGISTER 5 FRAMER A (Address = 19 Hex)
(MSB)
(LSB)
TJC
LLB
LIAIS
TCM4
TCM3
TCM2
TCM1
TCM0
SYMBOL
POSITION
NAME AND DESCRIPTION
TJC
CCR5A.7
Transmit Japanese CRC6 Enable.
0 = use ANSI/AT&T/ITU CRC6 calculation (normal operation)
1 = use Japanese standard JT–G704 CRC6 calculation
LLB
CCR5A.6
Local Loopback.
0 = loopback disabled
1 = loopback enabled
LIAIS
CCR5A.5
Line Interface AIS Generation Enable. See Figure 1–1 for
details. AIS generation is based on MCLK.
0 = allow normal data from TPOSIA/TNEGIA to be transmitted
at TTIP and TRING
1 = force unframed all 1’s to be transmitted at TTIP and TRING
TCM4
CCR5A.4
Transmit Channel Monitor Bit 4. MSB of a channel decode
that determines which transmit channel data will appear in the
TDS0M register. See Section 10 for details.
TCM3
CCR5A.3
Transmit Channel Monitor Bit 3.
TCM2
CCR5A.2
Transmit Channel Monitor Bit 2.
TCM1
CCR5A.1
Transmit Channel Monitor Bit 1.
TCM0
CCR5A.0
Transmit Channel Monitor Bit 0. LSB of the channel
decode.



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