DS2196 datasheet(56/157 Pages) DALLAS

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DS2196

56 of 157

RIR3A: RECEIVE INFORMATION REGISTER 3 FRAMER A (Address = 10

Hex)

(MSB)

(LSB)

RL1

RL0

JALT

LORC

LRCL

–

RAIS-CI

SYMBOL

POSITION

NAME AND DESCRIPTION

RL1

RIR3A.7

Receive Level Bit 1. See Table 7–1.

RL0

RIR3A.6

Receive Level Bit 0. See Table 7–1.

JALT

RIR3A.5

Jitter Attenuator Limit Trip. Set when the jitter attenuator

FIFO reaches to within 4 bits of its limit; useful for debugging

jitter attenuation operation.

LORC

RIR3A.4

Loss of Receive Clock. Set when the RCLKIA pin has not

transitioned for at least 2

ms (3 ms ± 1ms).

LRCL

RIR3A.3

Line Interface Receive Carrier Loss. Set when 192

consecutive zeros have been received at the RRING and RTIP

pins; allowed to be cleared when 14 or more 1’s out of 112

possible bit positions are received.

–

RIR3A.2

Not Assigned. Could be any value when read.

–

RIR3A.1

Not Assigned. Could be any value when read.

RAIS-CI

RIR3A.0

Receive AIS-CI Detect. Set when the AIS-CI pattern is

detected. (see note below)

RIR3B: RECEIVE INFORMATION REGISTER 3 FRAMER B

(Address = B0 Hex)

(MSB)

(LSB)

–––

LORC

–––

RAIS-CI

SYMBOL

POSITION

NAME AND DESCRIPTION

–

RIR3B.7

Not Assigned. Could be any value when read.

–

RIR3B.6

Not Assigned. Could be any value when read.

–

RIR3B.5

Not Assigned. Could be any value when read.

LORC

RIR3B.4

Loss of Receive Clock. Set when the RCLKIB pin has not

transitioned for at least 2

ms(3ms ± 1ms).

–

RIR3B.3

Not Assigned. Could be any value when read.

–

RIR3B.2

Not Assigned. Could be any value when read.

–

RIR3B.1

Not Assigned. Could be any value when read.

RAIS-CI

RIR3A.0

Receive AIS-CI Detect. Set when the AIS-CI pattern is

detected. (see note below)

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