DS2196 datasheet(19/157 Pages) DALLAS

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DS2196

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Signal Name:

PNRZ

Signal Description:

Protect NRZ Data

Signal Type:

Input

This digital input is used to pass a NRZ data stream via the Data Source Selection MUX and the jitter attenuator

block to the RPOSLO and RNEGLO output pins. Data input to this pin is sampled on the falling or rising edge of

PCLK.

Signal Name:

PCLK

Signal Description:

Protect Clock

Signal Type:

Input

This digital input is used to pass a 1.544 MHz clock via the Data Source Selection MUX and the jitter attenuator

block to the RCLKLO output pin.

Signal Name:

RCL

Signal Description:

Receive Carrier Loss

Signal Type:

Output

Set high when the line interface (LIU) detects a carrier loss.

Signal Name:

RPOSLO

Signal Description:

Receive Positive Data Output from the LIU

Signal Type:

Output

Updated on the rising edge of RCLKLO with either bipolar data out of the LIU or NRZ data from the WNRZ or

PNRZ inputs.

Signal Name:

RNEGLO

Signal Description:

Receive Negative Data Output from the LIU

Signal Type:

Output

Updated on the rising edge of RCLKLO with either bipolar data out of the LIU or NRZ data from the WNRZ or

PNRZ inputs.

Signal Name:

RCLKO

Signal Description:

Receive Clock Output

Signal Type:

Output

Either a buffered recovered clock from the T1 line or the clock provided at the WCLK or PCLK inputs.

Signal Name:

WPS

Signal Description:

Working or Protect Select

Signal Type:

Input

This digital input can be used to select between the WNRZ/WCLK (working) or PNRZ/PCLK (protect) data

inputs. For this pin to be active the Data Source MUX must be properly configured via the CCR1A.2, CCR1A.3,

and CCR1A.4 control bits.

DS2196 датащи(PDF) 19 Page - Dallas Semiconductor

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