DS2196 datasheet(17/157 Pages) DALLAS

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DS2196

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Signal Name:

JTCLK

Signal Description:

JTAG IEEE 1149.1 Test Serial Clock

Signal Type:

Input

This signal is used to shift data into JTDI on the rising edge and out of JTDO on the falling edge. If not used, this

pin should be pulled high.

Signal Name:

JTDI

Signal Description:

JTAG IEEE 1149.1 Test Serial Data Input

Signal Type:

Input

Test instructions and data are clocked into this signal on the rising edge of JTCLK. If not used, this pin should be

pulled high. This pin has an internal pull-up.

Signal Name:

JTDO

Signal Description:

JTAG IEEE 1149.1 Test Serial Data Output

Signal Type:

Output

Test instructions are clocked out of this signal on the falling edge of JTCLK. If not used, this pin should be left

open circuited.

Signal Name:

JTRST*

Signal Description:

JTAG IEEE 1149.1 Test Reset

Signal Type:

Input

This signal is used to synchronously reset the test access port controller. At power up, JTRST must be set low and

then high. This action will set the device into the boundary scan bypass mode allowing normal device operation.

If boundary scan is not used, this pin should be held low. This pin has an internal pull-up.

Signal Name:

JTMS

Signal Description:

JTAG IEEE 1149.1 Test Mode Select

Signal Type:

Input

This signal is sampled on the rising edge of JTCLK and is used to place the test port into the various defined IEEE

1149.1 states. If not used, this pin should be pulled high. This signal has an internal pull-up.

Line Interface Pins

Signal Name:

MCLK

Signal Description:

Master Clock Input

Signal Type:

Input

A 1.544 MHz (±50 ppm) clock source with TTL levels is applied at this pin. This clock is used internally for both

clock/data recovery and for jitter attenuation. This clock is also used to source AIS within the LIU.

Signal Name:

RTIP & RRING

Signal Description:

Receive Tip and Ring

Signal Type:

Input

Analog inputs for clock recovery circuitry. These pins connect via a 1:1 transformer to the T1 line. See Section 19

for details.

Signal Name:

TTIP & TRING

Signal Description:

Transmit Tip and Ring

Signal Type:

Output

Analog line driver outputs. These pins connect via a 1:2 step–up transformer to the T1 line. See Section 19 for

details.

Signal Name:

LFSYNC

Signal Description:

LIU Frame Sync

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