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ADF4356 датащи(PDF) 17 Page - Analog Devices

номер детали ADF4356
подробное описание детали  6.8 GHz Wideband Synthesizer with Integrated VCO
PDF  35 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADF4356 датащи(HTML) 17 Page - Analog Devices

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Data Sheet
ADF4356
Rev. 0 | Page 17 of 35
REGISTER 7
REGISTER 8
REGISTER 9
REGISTER 10
REGISTER 11
REGISTER 12
REGISTER 13
14-BIT AUXILIARY MODULUS MSB VALUE (MOD2_MSB) DBR 1
14-BIT AUXILIARY FRACTIONAL MSB VALUE (FRAC2_MSB) DBR 1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
1
0
0
0
0
0
0
0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
C3(1) C2(0) C1(0)
C4(1)
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
C3(1) C2(0) C1(1)
C4(1)
CONTROL
BITS
PHASE RESYNC CLOCK VALUE
RESERVED
CONTROL
BITS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
SL1
SL2
SL3
SL4
SL5
AL1
AL2
AL3
AL4
AL5
TL1
TL2
TL3
TL4
TL5
TL6
TL7
TL8
TL9
TL10
VC1
VC2
VC3
VC4
VC5
VC6
VC7
VC8
C3(0) C2(0) C1(1)
C4(1)
C3(0) C2(1) C1(0)
C4(1)
ADC
CLOCK DIVIDER
RESERVED
AUTOMATIC
LEVEL CALIBRATION
TIMEOUT
TIMEOUT
VCO BAND DIVISION
CONTROL
BITS
SYNTHESIZER
LOCK TIMEOUT
CONTROL
BITS
AE1
AE2
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
RESERVED
RESERVED
CONTROL
BITS
0
1
0
0
0
0
0
C3(0) C2(1) C1(1)
C4(1)
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
1
0
VH
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9 DB8
DB7
DB6
DB5 DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
0
0
0
0
LD1
C3(1) C2(1) C1(1)
CONTROL
BITS
RESERVED
RESERVED
C4(0)
LD2
LD3
LOL
LD4
LD5
LD
CYCLE
COUNT
0
0
0
0
0
0
0
0
LE1
LE2
1
DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
0
RESERVED
CONTROL
BITS
1
0
1
0
0
0
1
0
0
1
C3(0) C2(0) C1(0)
C4(1)
0
0
0
1
0
1
1
1
1
1
1
1
0
0
0
Figure 27. Register Summary (Register 7 to Register 13)



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