XRT8001IP datasheet(26/48 Pages) EXAR

26 / 48 page

XRT8001

Rev. 1.01

Step 3 – Upon reviewing Table 6, write the listed

value (under the “Value to Write to D4 – D1 in CR0”

Command Register CR0, as illustrated below:

Command Register CR0 (Address = 0x00)

IOC4

IOC3

IOC2

IOC1

PL1EN

Value to Write to D4 – D1 in CR0

Notes:

If the user wishes to output a clock signal via the CLK1

output signal, then he/she should also write a “1” into

the “PL1EN” bit-field within Command Register CR0.

The contents of bit-fields D4 through D1 (within Com-

mand Register CR1) are “Don’t Care”

If the user wishes to output a clock signal via the CLK2

output signal, then he/she should also write a “1” into

the “PL2EN” bit-field within Command Register CR1.

This step configures the XRT8001 to operate in the

“Fractional T1/E1 Reverse/Master” Mode.

Step 4 – Specify the value of “P” (e.g., as in the “P x

56kHz” or “P x 64kHz” clock signal which is to be input

via the FIN Reference Clock input).

In order to specify the value for “P”, one needs to write

in the value of “P - 1” (binary format) into Command

Command Register, CR2 (Address = 0x02)

SEL14

SEL13

SEL12

SEL11

SEL10

Value of “P - 1” (in Binary Format).

In other words, if one intends to input either a “56kHz”

or “64kHz” clock signal via the “FIN” input pin (e.g.,

where P = 1), then he/she should write a “0” into

Command Register CR2.

Command Register, CR3 (Address = 0x03)

SEL24

SEL23

SEL22

SEL21

SEL20

Step 6 – Enable any of the following output signals as

appropriate: “SYNC”, “CLK1”, “CLK2” and “LOCKDET”.

This is accomplished by writing a “1” into the corre-

sponding bit-fields, within Command Register CR4, as

illustrated below:

Command Register CR4, (Address = 0x04)

SYNCEN

CLK1EN

CLK2EN

LDETDIS2

LDETDIS1

6.4 The “E1 to T1 –Forward/Master” Mode

When the XRT8001 WAN Clock has been configured to

operate in the “E1 to T1 – Forward/Master” Mode, then

it will accept a “Q x 2.048MHz” clock signal via the

“Reference Clock” input at FIN (pin 3), where “Q” can

range anywhere between 1 - 16. In response to this

clock signal, the XRT8001 WAN Clock will output a

1.544MHz clock signal via the Clock Output pins

(CLK1 and/or CLK2).

A simple illustration of the XRT8001 WAN Clock,

operating in the “E1 to T1 - Forward/Master” Mode is

presented in Figure 16.

Step 5 – Write the binary expression “11111” into

Command Register CR3.

This step is necessary in order to insure proper opera-

tion of the XRT8001. This step is also illustrated below:

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