VDP3133Y datasheet(64/76 Pages) MICRONAS

64 / 76 page

VDP 313xY

ADVANCE INFORMATION

Micronas

3.6.4.5. Test Input

3.6.4.6. Analog Video Front-End and A/D Converters

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

VIL

Input Low Voltage

TEST

−−

0.8

VIH

Input High Voltage

2.0

−−

Ipd

Input Pull-Down Current

170

µAVi = V

SUPD

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

VVRT

Reference Voltage Top

VRT

2.5

2.6

2.8

µF/10 nF, 1 GΩ Probe

VVRTN

Reference Voltage Top Noise

−−

100

mVPP

Luma – Path

RVIN

Input Resistance

VIN1-4

−−

Ω

Code Clamp–DAC=0

CVIN

Input Capacitance

−

VVIN

Full Scale Input Voltage

1.8

2.0

2.2

VPP

min. AGC Gain

VVIN

Full Scale Input Voltage

0.5

0.6

0.7

VPP

max. AGC Gain

AGC

AGC step width

−

0.166

−

6-Bit Resolution= 64

Steps

fsig= 1 MHz,

– 2 dBr of max. AGC–

Gain

DNLAGC

AGC Differential

Non-Linearity

−−±0.5

LSB

VVINCL

Input Clamping Level, CVBS

−

1.0

−

Binary Level = 64 LSB

min. AGC Gain

QCL

Clamping DAC Resolution

−16

−

steps

5 Bit

− I–DAC, bipolar

VVIN=1.5 V

ICL–LSB

Input Clamping Current per

step

0.7

1.0

1.3

DNLICL

Clamping DAC Differential

Non-Linearity

−−±0.5

LSB

Chroma – Path (composite)

RCIN

Input Resistance

SVHS Chroma

CIN1

CIN2

1.4

2.0

2.6

Ω

VCIN

Full Scale Input Voltage,

Chroma

1.08

1.2

1.32

VPP

VCINDC

Input Bias Level,

SVHS Chroma

−

1.5

−

Binary Code for Open

Chroma Input

−

128

−−

Chroma

− Path (component)

RVIN

Input Resistance

CBIN,

CRIN

Ω

Code Clamp

−DAC = 0

CVIN

Input Capacitance

4.5

VVIN

Full Scale Input Voltage

0.76

0.84

0.92

VPP

minimal range

VVIN

Full Scale Input Voltage

1.08

1.2

1.32

VPP

extended range

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