VDP3133Y datasheet(42/76 Pages) MICRONAS

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VDP 313xY

ADVANCE INFORMATION

Micronas

148

Enable automatic standard recognition (ASR)

bit[0]

0/1

PAL B,G,H,I (50 Hz)

4.433618

bit[1]

0/1

NTSC M

(60 Hz)

3.579545

bit[2]

0/1

SECAM

(50 Hz)

4.286

bit[3]

0/1

NTSC44

(60 Hz)

4.433618

bit[4]

0/1

PAL M

(60 Hz)

3.575611

bit[5]

0/1

PAL N

(50 Hz)

3.582056

bit[6]

0/1

PAL 60

(60 Hz)

4.433618

bit[10:7]

reserved set to 0

bit[11]

reset status information ‘switch’ in asr_status

(cleared automatically)

0: disable recognition; 1: enable recognition

Note: For correct operation don’t change FP reg. 20h and 21h,

while ASR is enabled!

0ASR_ENA

14E

Status of automatic standard recognition

bit[0]

error of the vertical standard

(neither 50 nor 60 Hz)

bit[1]

detected standard is disabled

bit[2]

search active

bit[3]

search terminated, but failed

bit[4]

no color found

bit[5]

standard has been switched (since last reset

of this flag with bit[11] of asr_enable)

bit[4:0]

00000

all ok

00001

search not started, because vwin error

detected (no input or SECAM L)

00010

search not started, because detected vert.

standard not enabled

0x1x0

search started and still active

01x00

search failed (found standard not correct)

01x10

search failed, (detected color standard not

enabled)

1000

no color found (monochrome input or switch

betw. CVBS/SVHS necessary)

ASR_STATUS

VWINERR

DISABLED

BUSY

FAILED

NOCOLOR

SWITCH

picture start position, this register sets the start point of active

video, this can be used e.g. for panning. The setting is updated

when ’sdt’ register is updated.

0SFIF

Table 2–6: Control Registers of the Fast Processor for control of the video frontend functions

−default values are initializied at reset

FP Sub-

address

Function

Default

Name

(hex)

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