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MCP3913 датащи(PDF) 42 Page - Microchip Technology |
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MCP3913 датащи(HTML) 42 Page - Microchip Technology |
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42 / 82 page ![]() MCP3913 DS20005227A-page 42 2013 Microchip Technology Inc. The default device address bits are A<6:5> = 01 (con- tact the Microchip factory for other available device address bits). For more information, see the Product Identification System section. The register map is defined in Table 8-1. 6.3 Reading from the Device The first register read on the SDO pin is the one defined by the address (A<4:0>) given in the CONTROL byte. After this first register is fully transmitted, if the CS pin is maintained logic low, the communication continues without an additional control byte and the SDO pin transmits another register with the address automatically incremented or not, depending on the READ<1:0> bit settings. Four different Read mode configurations can be defined through the READ<1:0> bits in the STATUSCOM register for the address increment (see Section 6.5, Continuous Communications, Looping on Register Sets and Table 8-2). The data on SDO is clocked out of the MCP3913 on the falling edge of SCK. The reading format for each register is defined on Section 6.5 “Continuous Communications, Looping on Register Sets” . FIGURE 6-2: Read on a Single Register with 24-bit Format (WIDTH_DATA<1:0> = 01, SPI Mode 1,1). FIGURE 6-3: Read on a Single Register with 24-bit Format (WIDTH_DATA<1:0> = 01, SPI Mode 0,0). READ Communication (SPI mode 1,1) Don’t care Don’t care SCK SDI SDO CS DATA<0> Hi-Z Hi-Z Device latches SDI on rising edge Device latches SDO on falling edge R/W READ Communication (SPI mode 0,0) Don’t care Don’t care Don’t care SCK SDI SDO CS DATA<23> Hi-Z Hi-Z Device latches SDI on rising edge Device latches SDO on falling edge |
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