VPC3230D datasheet(25/78 Pages) MICRONAS

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ADVANCE INFORMATION

VPC 323xD, VPC 324xD

Micronas

A summary of VPC modes is given in Table 2–9.

2.12.2. PIP Display Modes

To minimize the programming effort, 15 predefined PIP

modes are already implemented, including double win-

dows, single and multi-PIP (Fig. 2–23 and 2–24).

In addition an expert mode is available for advanced

PIP applications. In this case the inset picture size, as

well as the PIP window arrangements are fully pro-

grammable.

Examples for the PIP mode programming are given in

5.2.

2.12.3. Predefined Inset Picture Size

The predefined PIP display modes are based on four

fixed inset picture sizes (see Table 2–10). The corre-

sponding picture resizing is achieved by the integrated

horizontal and vertical scaler of VPC 32xxD, which

must be programmed accordingly (see Table 2–11).

The inset pictures are displayed with or without a

frame controlled by I2C. The fixed frame width is 4 pix-

els and 4 lines..

Notes:

1) must be > 47, if FIFOTYPE=0 or 1

2) BR=16 in register sc_bri

3) MSB of SC_MODE updates all scaler register

Table 2–9: VPC 32xxD modes for PIP applications

Working

mode

Function

pip

- decimate the video signal for the

inset pictures

- write the inset pictures into the field

memory

- write the frame and background

into the field memory

main

- deliver the video signal for the

main picture

- read the inset pictures from the

field memory and insert them into

the main picture

- write the resulting video signal

into the field memory for the scan

rate conversion (SRC)

single

- decimate the video signal for the

main or the inset picture(s)

- write the inset pictures into the field

memory

- write the frame and background

into the field memory

- write the main picture part outside

the inset pictures into the field

memory

- read the field memory (optional)

Table 2–10: Inset picture size (without frame) in the

predefined PIP modes

size

horizontal

[pixel/line]

vertical

[line/field]

4:3 screen

16:9 screen

625

line

525

line

13.5

MHz

13.5

MHz

1/2

332

392

248

292

132

110

1/3

220

260

164

196

1/4

164

196

124

148

1/6

112

132

Table 2–11: Scaler Settings for predefined PIP modes at 13.5 MHz

PIP size

scinc1

FP h’43

fflim

FP h’42

sc-pip

FP h’41

sc_bri2)

FP h’52

newlin1)

I2C h’22

avstrt1)

I2C h’28

avstop

I2C h’29

full

h’600

h’2d0

h’00

h’010

h’86

h’356

1/2

h’600

h’168

h’11

h’110

h’194

h’86

h’356

1/3

h’480

h’f0

h’16

h’210

h’194

h’86

h’356

1/4

h’600

h’b4

h’1a

h’210

h’194

h’86

h’356

1/6

h’480

h’78

h’1f

h’310

h’194

h’86

h’356

dou. win

h’acd

h’190

h’00

h’010

h’86

h’356

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